Age | Commit message (Collapse) | Author |
|
This adds an LPC I/O read transaction from an Intel H55 chipset.
[ gsi: rename probes to improve usability ]
|
|
This adds LPC I/O reads and writes and firmware reads and writes from
an IBM POWER9 processor. It also adds an example of an aborted
transaction.
|
|
|
|
Signed-off-by: Ben Gardiner <ben.l.gardiner@gmail.com>
[ gsi: usability nits, rename traces and update README ]
|
|
|
|
Submitted-By: ascuber <gchromestore@gmail.com>
|
|
[ gsi: README nits ]
|
|
[ gsi: minor README markup/flow nits, more perceivable chip function ]
|
|
Add file joy_it_sbc_irc01_all.sr which exceeds the previous 5% limit for
timing tolerances and would not decode at all.
Add file joy_it_sbc_irc01_enter_no_repeat.sr which lacks a repeat code
after a key press, which earlier decoder versions would have failed to
decode.
[ gsi: rename probes, add README, rephrase commit message ]
|
|
Create a README in the sle44xx/ parent directory, discuss the chip
family's features, and reference the Siemens datasheet. Extend the
README for the SLE4442 captures, don't assume that all users are
familiar with the chips and their protocol. The example dumps also
serve for learning and exploration of the curious. Fixup the probe
names (according to --show their names are in the 0..7 range).
|
|
Each dump file contains the capture of a single operation.
Dumps were performed with a generic fx2lafw device @ 500kHz
[ gsi: rephrase the commit message's caption ]
|
|
[ gsi: rephrase commit message, reflow README, consistent signal names ]
|
|
This capture was
Submitted-By: Philip Åkesson <philip.akesson@gmail.com>
[ gsi: rename probe for auto-assignment, add README, trim snippet for tests ]
|
|
[ gsi: README markup nits, and shorter snippet for automated test ]
|
|
STMicroelectronics ST25R3916 NFC chipset communication using SPI + IRQ pin for
scan/read UID of NFC-A/B/V and read all ST25R3916 registers Space A & B
|
|
This is a modified version of a capture that was
Submitted-By: Sebastian Rittau <srittau@rittau.biz>
The file was provided as an attachment to bug #1583. I renamed the file,
renamed the probe for automatic assignment to the decoder, upsampled to
100kHz for compatibility with the IRMP decoder, and added a README.
|
|
Captures were provided by Tom Flanagan <knio@zkpq.ca>. I renamed the
files and the probes, added a README, and trimmed several seconds of
idle input signal.
|
|
|
|
|
|
Rename captures to the "caliper*.sr" pattern. This avoids names which
start with dashes and could result in surprises. Users still can tell
whether to expect positive or negative values without too much effort.
Rename the probes. It's absolutely confusing to provide RXD and TXD
names for a protocol that has CLK and DATA signals. And users had to
manually assign the traces to decoder inputs after guessing which might
be which (it's not as obvious for calipers as I2C or SPI would be).
|
|
|
|
|
|
[ gsi: changed directory layout, reworked README markup ]
|
|
The PJON protocol can use several link layers. These captures run on
PJDL, demonstrate a minimal PJON frame (with TX info) and a response.
And also contain a few exceptional conditions: Glitches in the signal,
outside and inside of frames. Lack of recipient's response, too.
The snippets were extracted from a capture that was
Submitted-By: Julio Aguirre <jcallano@gmail.com>
|
|
|
|
|
|
This is not technically SPI as such (just a sync/clocked protocol).
It's a custom DAC protocol with SCLK, SDIN, CS#, CLR#, and LDAC# pins.
|
|
|
|
|
|
Signed-off-by: Teo Perisanu <Teo.Perisanu@analog.com>
|
|
Signed-off-by: Teo Perisanu <Teo.Perisanu@analog.com>
|
|
Signed-off-by: Teo Perisanu <Teo.Perisanu@analog.com>
|
|
Signed-off-by: Teo Perisanu <Teo.Perisanu@analog.com>
|
|
Signed-off-by: Teo Perisanu <Teo.Perisanu@analog.com>
|
|
|
|
|
|
Original files (used for conversion) were provided by Kongou Hikari (diodep):
https://github.com/sigrokproject/libsigrokdecode/pull/23#issuecomment-562906001
|
|
This is partially based on online searches and guesswork, might not
be entirely accurate.
|
|
|
|
The VCD input module of the libsigrok library currently exclusively
supports single bit logic data. Provide some captures in the VCD format
which exercise currently unsupported features which a future version of
the input module might want to support (bit vectors, multi bit numbers,
analog signals).
|
|
This is an example of PS/2 keyboard communication where the receiving
controller remains passive.
|
|
|
|
|
|
|
|
|
|
Created by davecraig.
Source:
https://github.com/sigrokproject/libsigrokdecode/pull/8
|
|
|
|
|
|
|
|
|