sle44xx: extend the README for the SLE4442 captures

Create a README in the sle44xx/ parent directory, discuss the chip
family's features, and reference the Siemens datasheet. Extend the
README for the SLE4442 captures, don't assume that all users are
familiar with the chips and their protocol. The example dumps also
serve for learning and exploration of the curious. Fixup the probe
names (according to --show their names are in the 0..7 range).

2 files changed, 54 insertions, 9 deletions

diff --git a/sle44xx/README b/sle44xx/README
new file mode 100644
index 0000000..cd60134
--- /dev/null
+++ b/sle44xx/README
@@ -0,0 +1,29 @@
+------------------------------------------------------------------------
+Siemens SLE44xx Chip Card Protocol
+------------------------------------------------------------------------
+
+SLE 4418/4428/4432/4442 memory cards implement a 2-wire protocol for data
+communication (signals CLK and I/O). A RST signal can be used to terminate
+currently pending long memory reads, and resets the card's address counter
+when combined with CLK. The next response data then is the Answer to Reset
+(ATR) which identifies the chip's capabilities, and allows to adjust for
+subsequent communication of more requests.
+
+See the Siemens document for details:
+
+  ICs for Chip Cards
+  Intelligent 256-Byte EEPROM
+  SLE 4432/SLE 4442
+  Data Sheet 07.95
+
+
+Logic analyzer setup
+--------------------
+
+  Probe    SLE44xx
+  ----------------
+  0        I/O
+  1        CLK
+  2        RST
+
+See subdirectories for chip specific example files.
diff --git a/sle44xx/sle4442/README b/sle44xx/sle4442/README
index 7930c40..b39d8ac 100644
--- a/sle44xx/sle4442/README
+++ b/sle44xx/sle4442/README
@@ -2,7 +2,9 @@
 Siemens SLE4442 Chip Card protocol capture
 -------------------------------------------------------------------------------
 
-This is a collection of reader-card communication dumps.
+See the parent directory for more general information. These captures
+correspond to the SLE4442 chip. Each file demonstrates an individual
+operation.
 
 
 Logic analyzer setup
@@ -12,27 +14,41 @@ The logic analyzer used was a Cypress FX2 no-brand device (at 500kHz):
 
   Probe       SLE4442 pin
   -----------------------
-  1           I/O
-  2           CLK
-  3           RST
+  0           I/O
+  1           CLK
+  2           RST
 
 
 sle4442_atr.sr
 --------------
-ATR issued by reader and response by card
+
+Reset issued by the reader, ATR (Answer to Reset) response sent by the card.
+
 
 sle4442_psc_correct.sr
 ----------------------
-Reader reset, PSC sent by reader to the card and accepted
+
+Reader reset, correct PSC (Programmable Security Code) sent by the reader to
+the card, and gets accepted.
+
 
 sle4442_psc_wrong.sr
 --------------------
-Reader reset, PSC sent by reader to the card and refused
+
+Reader reset, incorrect PSC sent by the reader to the card, and gets refused.
+
 
 sle4442_read_main_memory.sr
 ---------------------------
-Full read of main memory
+
+Full read of the card's main memory (complete address range). Includes the
+ATR content at offset 0.
+
 
 sle4442_write_cafe1337_offset_30.sr
 -----------------------------------
-Write 0xCA 0xFE 0x13 0x37 to main memory at offset 0x30, then main memory read
+
+Write 0xCA 0xFE 0x13 0x37 to main memory at offset 0x30, then read back
+several main memory regions (starting slightly before the recently written
+address range, and starting from the beginning of the card's memory). Each
+read continues to the end of the card's capacity.