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authorUwe Hermann <uwe@hermann-uwe.de>2012-04-19 19:04:35 +0200
committerUwe Hermann <uwe@hermann-uwe.de>2012-04-19 19:04:35 +0200
commit47cd3c8ff64cd43ddf47f5da497b88e30616b162 (patch)
tree8444bb4685c8466920e414ba48cf7ae82e63c70c /uart/trekstor_ebr30_a
parentf4298ac310a284590808a47d9e0d33ee449e15c4 (diff)
downloadsigrok-dumps-47cd3c8ff64cd43ddf47f5da497b88e30616b162.tar.gz
sigrok-dumps-47cd3c8ff64cd43ddf47f5da497b88e30616b162.zip
READMEs: Cosmetics, consistency fixes, typos.
Diffstat (limited to 'uart/trekstor_ebr30_a')
-rw-r--r--uart/trekstor_ebr30_a/README5
1 files changed, 1 insertions, 4 deletions
diff --git a/uart/trekstor_ebr30_a/README b/uart/trekstor_ebr30_a/README
index d953b46..6b6cc7f 100644
--- a/uart/trekstor_ebr30_a/README
+++ b/uart/trekstor_ebr30_a/README
@@ -15,10 +15,7 @@ The firmware sends the debug output at 115200 baud, with 8n1 settings.
Logic analyzer setup
--------------------
-The logic analyzer used for capturing is a ChronoVu LA8 at a sample rate
-of 1MHz.
-
-The ChronoVu LA8 probes were connected to the EBR30-a device like this:
+The logic analyzer used was a ChronoVu LA8 (at 1MHz):
Probe EBR30-a
-------------------