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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2012-04-19 19:04:35 +0200 |
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| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2012-04-19 19:04:35 +0200 |
| commit | 47cd3c8ff64cd43ddf47f5da497b88e30616b162 (patch) | |
| tree | 8444bb4685c8466920e414ba48cf7ae82e63c70c /uart/hello_world | |
| parent | f4298ac310a284590808a47d9e0d33ee449e15c4 (diff) | |
| download | sigrok-dumps-47cd3c8ff64cd43ddf47f5da497b88e30616b162.tar.gz sigrok-dumps-47cd3c8ff64cd43ddf47f5da497b88e30616b162.zip | |
READMEs: Cosmetics, consistency fixes, typos.
Diffstat (limited to 'uart/hello_world')
| -rw-r--r-- | uart/hello_world/README | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/uart/hello_world/README b/uart/hello_world/README index 5bd2f89..57365d6 100644 --- a/uart/hello_world/README +++ b/uart/hello_world/README @@ -19,14 +19,11 @@ http://olimex.com/dev/stm32-h103.html Logic analyzer setup -------------------- -The logic analyzer used for capturing is a ChronoVu LA8 at a sample rate -of 5MHz (for baud rates 921600 - 230400), 1MHz (for 115200 - 19200), -and 625kHz (for baud rates 9600 - 1200). - -The ChronoVu LA8 probes were connected to the UART like this: +The logic analyzer used was a ChronoVu LA8 at a sample rate of 5MHz (for baud +rates 921600 - 230400), 1MHz (115200 - 19200), and 625kHz (9600 - 1200): Probe UART - ------------------- + ---------------- 0 (green) TX |