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authorUwe Hermann <uwe@hermann-uwe.de>2011-11-24 20:38:58 +0100
committerUwe Hermann <uwe@hermann-uwe.de>2011-11-24 20:38:58 +0100
commit048863512d8088884b26248f9d026e1596923303 (patch)
tree889a9c165364b6150269c6daa798ecc016bda868 /i2c/a2_dummy_write/README
parent2c954388358f6f84251077b02face7c2e33cb3c3 (diff)
downloadsigrok-dumps-048863512d8088884b26248f9d026e1596923303.tar.gz
sigrok-dumps-048863512d8088884b26248f9d026e1596923303.zip
Rename a0_dummy_write/ to a2_dummy_write.
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+-------------------------------------------------------------------------------
+Dummy I2C writes
+-------------------------------------------------------------------------------
+
+This an example capture of some dummy I2C traffic, where the master writes
+to a slave at address 0x51 (or 0x2a, if the read/write bit is included)
+in an infinite loop. The slave does not respond.
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used for capturing was a ChronoVu LA8 at a sample rate
+of 1MHz. The logic analyzer probes were connected to the I2C pins like this:
+
+ Probe RTC chip pin
+ ------------------------
+ 0 (green) SCL
+ 1 (orange) SDA
+ GND GND
+
+
+Data
+----
+
+This is what the decoded data should look like:
+
+ - S Wr:0xa2 A 0x55 A 0x66 A P
+
+ - The abbreviations used above: S = Start, Wr = Write, A = ACK, P = Stop
+
+The sigrok command line used was:
+
+ sigrok-cli -d 0:samplerate=1mhz --samples 8388608 \
+ -p '1=SCL,2=SDA' -o a2_dummy_write.sr
+