From 048863512d8088884b26248f9d026e1596923303 Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Thu, 24 Nov 2011 20:38:58 +0100 Subject: Rename a0_dummy_write/ to a2_dummy_write. --- i2c/a2_dummy_write/README | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 i2c/a2_dummy_write/README (limited to 'i2c/a2_dummy_write/README') diff --git a/i2c/a2_dummy_write/README b/i2c/a2_dummy_write/README new file mode 100644 index 0000000..d7fe4e7 --- /dev/null +++ b/i2c/a2_dummy_write/README @@ -0,0 +1,36 @@ +------------------------------------------------------------------------------- +Dummy I2C writes +------------------------------------------------------------------------------- + +This an example capture of some dummy I2C traffic, where the master writes +to a slave at address 0x51 (or 0x2a, if the read/write bit is included) +in an infinite loop. The slave does not respond. + + +Logic analyzer setup +-------------------- + +The logic analyzer used for capturing was a ChronoVu LA8 at a sample rate +of 1MHz. The logic analyzer probes were connected to the I2C pins like this: + + Probe RTC chip pin + ------------------------ + 0 (green) SCL + 1 (orange) SDA + GND GND + + +Data +---- + +This is what the decoded data should look like: + + - S Wr:0xa2 A 0x55 A 0x66 A P + + - The abbreviations used above: S = Start, Wr = Write, A = ACK, P = Stop + +The sigrok command line used was: + + sigrok-cli -d 0:samplerate=1mhz --samples 8388608 \ + -p '1=SCL,2=SDA' -o a2_dummy_write.sr + -- cgit v1.2.3-54-g00ecf