| Age | Commit message (Collapse) | Author |
|---|
|
The previous implementation of the SAE J1850 (VPW) decoder dumped bytes
on one row and added another row with textual labels what those upper
row bytes would mean. That allowed manual inspection at a rather low
level of abstraction, but is not idiomatic and reduces usability of the
decoder.
Rewrite the decoder to become more idiomatic, and to prepare future
inspection of more upper layers. Concentrate all timestamp gathering in
.decode(), use PD API v3 for the IFS timeout as well, run handlers for
the lowest level symbols. Pass accumulated protocol bytes to a fields
handler, flush accumulated details when EOF is seen. Prepare validity
checks (checksum verification), and prepare to handle data bytes when
all header fields were seen and validity was checked. Emit annotations
in proper classes to improve usability, start emitting warnings. Force
re-synchronization when input stream conditions are not handled.
|
|
Eliminate unneeded instance variables. Start from None when values are
unknown. Only access data after checking its availability. Invalidate
previously accumulated details after processing. Prefer .format() over
string modulo. Use list .clear() where applicable. Use symbolic names
for annotation classes.
|
|
The earlier default was "RGB" (exactly three components), and users had
to manually pick "RGBW" when white was involved. Change the default to
the automatic "RGB[W]" instead which transparently presents white when
applicable, and doesn't fail when white is not involved.
|
|
The previous implementation presented bits and per-LED RGB-values (in
a from similar to HTML colours). This commit introduces annotations
for individual colour components (R/G/B/W) between these two levels
of abstraction.
|
|
Add developer comments at the top of the decoder source. Reference
datasheets, discuss vendor's numbers and what's used in the field.
Discuss variants (sets of involved colour components, alternative
timings, reset detection).
|
|
The 'type' option was not good enough. Replace it by 'wireorder' (order
of colour components on the wire, depends on the RGB LED chip type), and
'textorder' (presentation to users in annotations).
Support many more layouts of colour components on the wire. Cover all
permutations of R, G, and B. Support a few RGB plus W layouts that are
known to be in use. Adding more is just a matter of adding more choices
in the option, the implementation transparently follows.
Support a few text orders: Reflect the very order of bits on the wire.
Automatic support for RGB with optional White, or fixed RGB or RGB-W
variants (all are users' choices, default remains "RGB" for backwards
compatibility). Support arbitrary combinations of wire order and text
order in emitted annotations.
Keep support for the weird RGWB text format, which the previous decoder
implementation used for "all" RGBW types, and which is referenced by
existing test cases. It is uncertain which chip type is supposed to
generate this specific RGBW traffic. It is as uncertain why this text
order was chosen, which neither is the human readable RGBW format nor
matches the wire order. The previous implementation was introduced in
commit 47ff9910f7e1, but neither commented nor referenced literature or
external sources nor did the commit message contain any clues.
This current implementation needs more tests and reviews, but lends
itself better to maintenance, fixes and enhancements.
|
|
Concentrate timestamp gathering in the .decode() method, eliminate
instance members by using variables that are local to the method.
Finally use appropriate PD API v3 invocations. Use edge conditions plus
a counted 'skip' to detect the RESET pulse. Use a positive "check the
reset condition" logic, simplify the conditions which support the reset
pulse tracking, and which flush previously accumulated data when "the
bit time doesn't end" (the next edge is missing).
Improve robustness in those cases where captures use low oversampling
and similar length high and low pulses. The fixed (rather arbitrary?)
625us threshold resulted in several false last-bit values after the
API v3 conversion.
Heavily comment on this edge/pulse detection and timestamps logic,
since it's non-trivial and non-obvious. Keep all behaviour backwards
compatible before extending the feature set in future commits.
|
|
Pass all .decode() routine's bit handling through a common bit handler.
Accumulate the bit values as well as their ss/es timestamps. Reduce code
duplication in the bits handler. Use common support code to get the
24/32 bit wide integer from the list of bits. Prepare to handle streams
of different per-pixel length or layout.
This commit remains backwards compatible, and keeps all warts of the
previous implementation including inconsistent annotation order. Just
eliminates unnecessary instance members and hidden coupling, to keep
timestamp handling in the .decode() method.
|
|
Separate the construction of the list of texts for different zoom levels
from the emission of annotations. Use a .putg() helpers to match other
decoder implementations. Prefer .format() calls over "modulo" operations
on strings.
|
|
|
|
Rephrase the NES gamepad decoder to become more idiomatic Python.
Address nits to better match the sigrok project's coding style.
Eliminate hidden coupling by means of instance variables.
|
|
Rephrase the conditions which drive the I2C decoder's progress. Remove
self.state and its space separated string literals which were tedious to
search for, and which "lent themselves" to magic string matching. Use
other existing conditions instead, which also reduces redundancy.
Defer the "forgetting data bits" until after ACK was seen. Comment on
the motivation to keep the "protocol violating" implementation, which
misses error conditions that happen on the wire, but happens to support
heavily undersampled captures to an astonishing degree.
Also addresses minor style nits: Prefer to think of "dominant ACK" and
"recessive NAK". Rephrase a byte shift for the first address byte. Emit
the first warning annotation for the row which was declared before but
was not used so far.
|
|
It's unfortunate how the symbol / bit value handlers of the I2C decoder
keep redundantly accessing the .samplenum property. Ideally they should
just get an ss, es, value tuple, while the determination of these params
should be kept in the .decode() main loop.
Prepare the internal implementation to that approach, but enforce an
absolutely backwards compatible behaviour for now. This was verified by
the test suite. The data bit handler still keeps updating previous bits'
end positions when another bit is seen. Which assumes back to back bits
which strictly speaking does not match the protocol's definition. The
unfortunate application of the second last bit time's width to the last
bit time and the ACK slot is kept as well. And the code path needed to
be kept within the bit handler, because the second last bit's width only
becomes available when the last bit _was_ handled. Which means that the
main loop cannot provide a useful es value which matches the previous
implementation's behaviour.
|
|
The first address byte in an I2C transfer always carries the R/W bit.
Always shift this byte regardless of 7/10 bit addresses, and always emit
separate annotations for the address value part and the R/W bit part.
|
|
Eliminate how the I2C decoder's put methods take data as arguments and
hiddenly take ss/es from instance variables. This improves readability
during review. Rename .putx() to .putg() to match other decoders (emits
graphical annotations, in contrast to Python and binary).
Document the surprising BITS pdata order, stacked decoders get LSB first
sequences. To keep awareness during maintenance. Keep an explicit copy
of the LSB bits to simplify the implementation of the data byte handler
(sample numbers remain available at indices in their reception order).
|
|
The I2C decoder used to track the bitrate of the observed traffic
(number of address and data bits in a transfer). It's uncertain where
this output went (is meta still supported, are applications using it?),
and it appears to not be covered in tests. Improve the logic still.
Adjust the location of the emitted annotation. It used to start at the
most recently observed data byte, which looks suspicious. Output was
attempted when STOP was seen, even if the start was not observed. The
calculation dropped data before a repeated start. The implementation
kept data around after it became obsolete.
Break a long formula across several text lines. Use the fact that Python
division yields floating point results.
Add a comment in the ACK/NAK bit handler. It references data which was
gathered when accumulating data bits. Could be acceptable but must be
remained aware of.
|
|
Slightly unobfuscate how the I2C decoder invokes put methods. Present
the annotation class and the list of texts for different zoom levels
for readability. Also keep the data value presentation in that table
so that it holds all texts which users will see during decoder use.
Eliminate how the data bits used to bypass that table in the past.
This commit does not address the unfortunate self.ss/es coupling of
decoding code paths and annotation emitting helpers, which complicates
review of the decoder's implemented logic.
|
|
Collect all bits of a byte time in a Python list (as was done before).
Eliminate the bit counter and the value accumulator, use the list's
length during accumulation and common conversion support after the
accumulation instead.
Also comment on the non-trivial start/end sample number update logic.
The decoder implementation likes to claim data validity outside of the
high SCL phase, which does not agree with the strict I2C protocol idea.
Increases usability though (data visibility at zoom levels). This and
backwards compatibility makes us keep the logic, as long as we remain
aware of its implications.
Comment on the rather unexpected LSB first emission of annotations and
stacked layer data passing, while the I2C protocol itself is MSB first.
|
|
The at24 EEPROM decoder's previous implementation happened to access
caller's data even after the .decode() method invocation ended, and
their content has changed or the data was not valid any longer.
Get deep copies for those details which broke the test suite. Prepare
"generous" deep copies for other data which currently doesn't trigger
exceptions, but might be waiting for an accident to happen. Careful
inspection of the complex implementation and relaxing the current greed
of this commit remains for future commits. Comment heavily for awareness.
It is assumed that the 'databyte' name is misleading. And that much of
this upper layer decoder's complexity would be obsoleted by the lower
layer decoder's providing more useful packets (bytes and their ACK state,
read/write phases of transfers, complete transfers up to STOP, etc).
This commit does not address those readability or layering concerns.
|
|
The previous implementation suffered from a severe issue (it kept
referencing caller's data beyond its validity) and from style issues
(redundant details, conditions scattered across distant locations).
Rephrase (actually rework) the decoder implementation to improve
readability as well as maintainability. Extend the TODO list while
the existing logic better lends itself to future extensions. Reword
comments while we are here. Some earlier constraints no longer apply
or were unfortunately phrased.
|
|
Slave addresses can be of 7bit or 10bit type, which occupies one or two
bytes at the start of the frame. Detect when a 10bit address is seen,
and classify the following byte as yet another address byte (which the
previous implementation incorrectly classified as data byte).
This commit only accumulates the address value and adjusts the class of
annotations. It does not introduce new annotation classes or rows, to
not change the decoder in incompatible ways.
|
|
Use longer names for variables and adjust their data types to improve
readability of the "is write?", "is repeated start?" conditions. Use a
boolean when the condition is known, and preset to None when the state
is yet uncertain. Rename .bits[] to .data_bits[] to reflect that they
exclusively hold the byte's bits and not the ACK/NAK bit.
|
|
Add support for register field content checkers, and emit warning
annotations when they yield non-empty results. Implement a checker for
the INT field of register R0. Reduce the allowed values' lower limit
from 32 (previous implementation) to 23 (ADF4350 datasheet, figure 24).
|
|
Move table columns, put the bit field position to the front before the
name to get a less fragile visual appearance. All fields have a position
and a name (of variable length), some of them have a "parser" (actually
a formatter for their content).
Address Python style while we are here: Prefer tuples over lists for
immutable data. Add trailing commas to reduce future diff sizes.
Add a TODO comment about optional content checkers. The current decoder
implementation lets invalid register data pass unnoticed.
[ see a word diff for the commit's essence ]
|
|
Try a different presentation of exising information in the register
fields' display text construction (extra parsers for known fields).
Attempt a source code format which hopefully better lends itself to
index range verification during review.
Make the number of available expansion texts stand out more visually,
so that readers can compare their count to the register field's width.
Address those register fields with four or more expansion values, keep
the simple single bit cases as they are. Add a comment for awareness.
|
|
Rephrase the old style '%' operator string formatting, prefer .format()
calls instead. It is assumed that routine call argument lists are more
readable than optional/conditional tuples are, and not running format
specifiers and literal text into each other helps readability as well,
as do the .format() routine's optionally named references to parameters.
Avoid text formatting which involves concatenation, always work from one
single format instruction instead.
|
|
Move the inspection of a completed 32bit word into the .decode_word()
routine. This simplifies checks for fatal constraints, as well as
optional inspection of deeper detail levels when extra parsers are
available.
Rename variables in the code path which accumulate bits. Add comments
to helper routines and to essential steps in complex interpretation
code paths. Eliminate the unused return value of the .decode_field()
method. Results in a lean and readable .decode() body.
|
|
Separate data processing from text formatting in the code paths which
emit annotations. Introduce a local .putg() helper. This unobfuscates
the decoder's operation, and also happens to shorten text lines. Raises
awareness for zoom levels and alternative text during maintenance.
This commit incompatibly rephrases the "Wrong number of bits" message.
|
|
Use .extend() and .clear() for the Python list during accumulation of a
32bit word's bits sequence. This shall improve readability. Performance
is less of an issue since this decoder's data amount remains small
(32bit entities per SPI transfer).
Comment on the unexpected(?) SPI decoder's BITS ordering when passing
details up to stacked decoders. Raise and keep awareness for this
non-obvious implementation detail during decoder maintenance.
This implementation accumulates bits in the MSB order as they are sent
in SPI frames. Yet keeps the LSB bit order when a completely accumulated
32bit word gets inspected, to reduce the diff size. Bit field extraction
and annotation emission code paths assume a specific timestamp ordering.
The separation of transport and inspection also simplifies maintenance,
should a future SPI decoder provide BITS in their received order.
|
|
Use common support code to convert bit fields to integer numbers. Also
unobfuscate the decode_bits() method and its returned values' layout.
Improves readability and factors out common expressions.
|
|
The previous implementation of the ADF435x decoder assumed knowledge of
internal details which are the SPI transport layer's responsibility. And
encoded an inappropriate chip select polarity in the process (falling
CS edge). The datasheet specifies that previously clocked in data bits
get latched on rising LE edges.
Not all setups were affected, that's why the issue went unnoticed before.
Use the lower layer's TRANSFER annotation to process the completion of
an ADF435x register access, after BITS annotations made the location of
individual bits available. The LE (CS) signal's polarity remains a detail
of the SPI decoding layer, and must be configured there. The SPI decoder's
default matches the ADF435x chip's expectation.
This fixes bug #1814.
Reported-by: Martin Homuth-Rosemann <homuth-rosemann@gmx.net>
|
|
Check the bit count of SPI transfers. Only start inspecting ADF435x
register content when the accumulation of the expected 32bit word has
completed. Emit a warning annotation for unexpected transfer sizes.
|
|
Avoid generic variable names. Only unpack parameters which are provided
by the lower layer decoder after the stacked decoder checked their type
and is aware of their meaning.
|
|
The "parallel" decoder buffers the currently seen data pattern, and
defers annotation emission until the end position is known. Which is
why the last data pattern would not show up in the decoder's output.
See bug #292 and its duplicates for examples and concerns.
Catch the EOFError exception, and flush previously accumulated data.
It is yet to get determined whether a warning annotation is due. Most
probably not for "parallel" which merely visualizes data line states.
But other decoders which have the concept of frames shall NOT follow
this "parallel" decoder's naive approach, and claim that a frame had
completed although its end condition was never seen. Add a developer
TODO comment to raise awareness.
|
|
The .get_wait_cond() routine kept re-calculating the current bit index
in the currently inspected UART frame. Just count the bits instead as
they are seen/taken. This eliminates redundant complex logic which had
hard to track down issues in past revisions. Increases robustness, and
improves maintainability.
|
|
Sample and process multiple STOP bits as specified, add 2.0 to the list
of supported configurations. This implementation works as expected with
integer numbers of STOP bits (0, 1, 2). For half-bits the sample point
as well as the annotation position will be incorrect (as a result of an
internal implementation detail of the existing decoder which is not easy
to address).
This commit reduces the diff size, and remains backwards bug-compatible.
Fixing the bit boundaries in annotations including support for half-bits
is more involved, and remains for a later commit.
|
|
Use common code to advance internal state during UART frame inspection.
This reduces redundancy, and improves robustness. Data bits collectors
need not worry about the optional presence of subsequent fields (parity,
stop bits, both can be absent).
Improve the separation of implementation details of the lower layer UART
frame decoding from upper layer protocol handling. Concentrate the post
processing of UART frames, BREAK and IDLE conditions in the source, and
keep the ss/es determination at the caller which detected the condition
by arbitrary means.
This unbreaks the decoder's operation when 0 stop bits are configured.
The implementation still assumes that the line goes idle between frames
even when zero stop bits are configured. Strictly speaking this decoder
now copes with traffic that uses "less than half a stop bit".
|
|
This is the SBUS remote control by Futaba, the 25 bytes on top of UART.
Not the computer peripheral bus. Hence the suffix in the decoder name.
The implementation was tested with synthetic data. Example captures with
real world data have yet to become available. This implementation shows
the message framing, the proportional and digital channels' values, and
the flags. Several warnings for short and long and invalid messages are
implemented, as are user adjustable channel value range limits.
The boilerplate may need adjustment. All naming was made up by me based
on what information was available (vendor doc was missing).
|
|
Rephrase how the external IRMP library gets loaded, to provide better
diagnostics to users. All decoder instances are equal after the recent
introduction of locking support.
Move the "reset state" call for the IRMP decoder core to the .decode()
method's main loop, where the context manager holds the instance lock.
This allows "parallel" execution of multiple IRMP decoders in the same
sigrok application, assuming that the context manager scope will be
left at some point in time.
This fixes bug #1581 when applications communicate EOF to decoders.
Move some Python object members to local variables. They exclusively
are used within the .decode() method.
Update the copyright for the non-trivial changes.
|
|
Extend the ctypes wrapper for the IRMP decoder core. Add routines for
the instance state creation and lock management. Implement metamethods
for Python context managers which lock the instance to protect the C
library's internal state from changing unexpectedly. Add my copyright
for the non-trivial changes.
This commit eliminates the limitation to a single IRMP decoder core for
the sigrok process to use. Multiple Python callers can synchronize their
library use, and see a consistent library state across the scope of the
context manager. It's essential though that callers leave the context
to not block other callers for extended periods of time.
|
|
|
|
|
|
The concurrent assertion of ATN and EOI is a PP (parallel poll) query.
The host asserts the control signals, and configured devices may assert
the DIO lines in response.
Because DAV is not involved, and because the input capture may not have
DIO at the start of the PP phase, and may neither have DIO any more at
its end, the check for parallel poll is more complex. Unconditionally
inspecting each sample of the capture is inefficient. Keep manipulating
the main loop's wait conditions instead, to stick with edge navigation
as long as possible, and only switch to inspection of individual samples
when strictly needed.
It's also important to gracefully handle low oversampling. Existing test
cases suffered from PP glitches when ATN asserted in the same location
where EOI deasserted. Be extra conservative about the presence of the
PP phase, expect at least two samples (a difference between its start
and end position) before emitting the annotation.
|
|
The description text of the Commodore peripherals option spanned a
rather wide space. Trim the text for consistency with other options.
|
|
HP gear is said to sometimes send commands (ATN asserted) with a parity.
Introduce an option to check and strip the MSB before interpretation.
Reported-By: Anders Gustafsson <Anders.Gustafsson@pedago.fi>
|
|
|
|
|
|
For now, libsigrokdecode clients expect to receive a 1:1 number of
input samples to logic output samples, along with a logic output
samplerate equal to the PD's input sample rate
|
|
This means that the samplerate for logic output channels is
implicitly determined by the input channel samplerate.
The motivation for this is that hard-coding a samplerate isn't
possible - but at the same time, it's also not possible to
determine the samplerate at the time the logic output channels
are initialized, as the samplerate can be set at runtime.
From my point of view, we would need one of two mechanisms to
make this work:
1) Allow creation of logic outputs at runtime via some
registration callback
or
2) Allow changing a logic output's samplerate after it has been
created, again requiring some kind of callback
To me, both currently are overkill because making the assumption
that samplerate_in = samplerate_out not only makes this problem
go away as it can easily be handled on the client side where
samplerate_in is already known, it also makes handling of the
logic data in the PDs easier.
|
|
|
