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The official abbreviation for CMD24 in the spec is "WRITE_BLOCK", as
opposed to "WRITE_MULTIPLE_BLOCK" for CMD25 (chapter 4.7.4,
"Detailed Command Description", table 4-24).
The byte preceeding e.g. the CMD24 block data is called "Start Block" token
(chapter 7.3.3.2, "Start Block Tokens and Stop Tran Token"). We don't
include the "token" itself for consistency, since the decoder doesn't do
that for any other tokens either.
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Address some nits in the SDCard (SPI mode) protocol decoder. Rename
identifiers to eliminate comments. Determine the default block size at
the start of the write command instead of the iteration over payload
data bytes. Remove a print() statement which would break regression
tests. Allow re-use of the data handler for other commands, too. Use
lower case hex digits for consistency across the source file, and
slightly unobfuscate a bit pattern check while we are here. Improve
robustness of response handlers and how internal state gets advanced.
Replace constant lookups by direct method calls.
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The previous implementation advanced from the start of CMD24 to IDLE.
This commit introduces support for the data phase and data response of
CMD24. Which results in improved usability of the decoder output, and
reduced probability of false positives (don't detect "commands" in the
payload data).
This commit addresses the missing CMD24 handling part of bug #1365.
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Only add items to 'outputs' if the respective PD actually has
OUTPUT_PYTHON support implemented as of right now.
Various decoders might get OUTPUT_PYTHON support later, but the
'outputs' field should reflect the current status.
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This is a 1-Wire 8-channel addressable switch.
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For details see the DS2408 datasheet, section "Power-up timing".
This commit is adding this missing command so now a full decoding
is possible:
Annotations from 1-Wire network layer:
8990980-8991220 1-Wire network layer: : Reset/presence: true
8994163-8994437 1-Wire network layer: : ROM command: 0x96 'DS2408: Disable Test Mode'
8995026-9008178 1-Wire network layer: : ROM: 0xa30000001246a929
9008785-9009060 1-Wire network layer: : Data: 0x3c
9012290-9012530 1-Wire network layer: : Reset/presence: true
And from the specific stacked DS2408 slave:
8990980-8991220 DS2408: : Reset/presence: true
8995026-9008178 DS2408: : ROM: 0xa30000001246a929 (family code 0x29)
9008785-9009060 DS2408: : Disable Test Mode (0x3c)
9012290-9012530 DS2408: : Reset/presence: true
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For details see the DS2408 datasheet, section "Resume Command [A5h]".
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screen" from functioning
Source: https://en.wikipedia.org/wiki/RC-5#Command_Tables
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- Square wave frequencies above 1 Hz are in Hz not in kHz.
- AM/PM flag is in the bit 5 of hours register not in bit 6.
- AM flag is valid at 0 value of AM/PM flag not at 1 value.
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The "Frame error?" TODO comment on Python annotations has become
obsolete. Individual bit errors within the frame immediately get
communicated as they are detected (START, parity, STOP). The overall
frame's validity has become available with the FRAME annotation.
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Internally keep track of the UART frame's validity. Emit a FRAME Python
annotation for aborted as well as for completed frames. This obsoletes a
TODO comment in the STOP bit code path.
This annotation also spans the complete frame's length, including start
and parity and stop bits, which the DATA annotation doesn't cover.
Stacked decoders can individually decide whether to strictly reference
the mere data bits section or the complete UART frame which happened to
communicate the data value.
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1. WS = 0, Left Channel; WS = 1, Right Channel
2. Data start and end at falling edge of SCK
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Minimal implementation of chip erase 0x60 and 0xc7 command handling
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There are the "traffic inspecting" wait() conditions, which check an
edge to find the start of START, then wait for sample points to grab the
bit values. Bit times are sampled in their respective center, potential
glitches around sample points get ignored.
Add another independent set of wait() conditions which check _all_ edges
regardless of any data communication. This results in the most reliable
and maintainable detection of break conditions, regardless of how they
align to data frames. Break is defined as a period of low input signal
which spans at least one frame's length. Run the edge inspection after
data inspection, which results in the most appropriate annotation output
like leading data bits (of incomplete frames), frame errors (violated
STOP bit expectations), then break conditions. This approach is most
robust in the presence of incomplete input streams.
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