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author | Vesa-Pekka Palmu <vpalmu@depili.fi> | 2018-10-18 01:56:26 +0300 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2018-10-21 17:37:04 +0200 |
commit | 2e3e0840d6cc8ad16b9964dcf5615371591e7f9f (patch) | |
tree | 5d99e6f2a11df4fc86f555d5c52634ba76c13c4b /decoders | |
parent | 539e6dafe7889e76061b9015ac522699d46082c0 (diff) | |
download | libsigrokdecode-2e3e0840d6cc8ad16b9964dcf5615371591e7f9f.tar.gz libsigrokdecode-2e3e0840d6cc8ad16b9964dcf5615371591e7f9f.zip |
spiflash: Bugfix: WRSR was using miso for register decode
Diffstat (limited to 'decoders')
-rw-r--r-- | decoders/spiflash/pd.py | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/decoders/spiflash/pd.py b/decoders/spiflash/pd.py index 304545f..3d525b9 100644 --- a/decoders/spiflash/pd.py +++ b/decoders/spiflash/pd.py @@ -246,12 +246,12 @@ class Decoder(srd.Decoder): self.emit_cmd_byte() elif self.cmdstate == 2: # Byte 2: Master sends status register 1. - self.putx([Ann.BIT, [decode_status_reg(miso)]]) + self.putx([Ann.BIT, [decode_status_reg(mosi)]]) self.putx([Ann.FIELD, ['Status register 1']]) elif self.cmdstate == 3: # Byte 3: Master sends status register 2. # TODO: Decode status register 2 correctly. - self.putx([Ann.BIT, [decode_status_reg(miso)]]) + self.putx([Ann.BIT, [decode_status_reg(mosi)]]) self.putx([Ann.FIELD, ['Status register 2']]) self.es_cmd = self.es self.putc([Ann.WRSR, self.cmd_ann_list()]) |