onewire: the split of the protocol into layers works now

7 files changed, 25 insertions, 27 deletions

diff --git a/decoders/Makefile.am b/decoders/Makefile.am
index b7e654e..82e6b83 100644
--- a/decoders/Makefile.am
+++ b/decoders/Makefile.am
@@ -42,5 +42,6 @@ SUBDIRS = \
 	uart_dump \
 	usb_signalling \
 	usb_protocol \
-	onewire
+	onewire_link \
+	onewire_network
 
diff --git a/decoders/onewire_link/Makefile.am b/decoders/onewire_link/Makefile.am
index 17b3b04..b043eca 100644
--- a/decoders/onewire_link/Makefile.am
+++ b/decoders/onewire_link/Makefile.am
@@ -18,9 +18,9 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
-pkgdatadir = $(DECODERS_DIR)/onewire
+pkgdatadir = $(DECODERS_DIR)/onewire_link
 
-dist_pkgdata_DATA = __init__.py onewire_link.py onewire_network.py
+dist_pkgdata_DATA = __init__.py onewire_link.py
 
 CLEANFILES = *.pyc
 
diff --git a/decoders/onewire_link/__init__.py b/decoders/onewire_link/__init__.py
index 0a712ef..6eaeadd 100644
--- a/decoders/onewire_link/__init__.py
+++ b/decoders/onewire_link/__init__.py
@@ -74,5 +74,3 @@ TODO:
 '''
 
 from .onewire_link    import *
-from .onewire_network import *
-
diff --git a/decoders/onewire_link/onewire_link.py b/decoders/onewire_link/onewire_link.py
index 3236f4d..44bc4f8 100644
--- a/decoders/onewire_link/onewire_link.py
+++ b/decoders/onewire_link/onewire_link.py
@@ -57,8 +57,9 @@ class Decoder(srd.Decoder):
         self.state   = 'WAIT FOR FALLING EDGE'
         self.present = 0
         self.bit     = 0
+        self.bit_cnt = 0
+        self.command = 0
         self.overdrive = 0
-        self.cmd_cnt = 0
         # Event timing variables
         self.fall    = 0
         self.rise    = 0
@@ -171,11 +172,11 @@ class Decoder(srd.Decoder):
                     if (self.bit):  self.state = 'WAIT FOR FALLING EDGE'
                     else         :  self.state = 'WAIT FOR RISING EDGE'
                     self.put(self.fall, self.cnt_bit[self.overdrive], self.out_ann, [0, ['BIT: %01x' % self.bit]])
-                    self.put(self.out_proto, ['BIT', self.bit])
+                    self.put(self.fall, self.cnt_bit[self.overdrive], self.out_proto, ['BIT', self.bit])
                     # Checking the first command to see if overdrive mode should be entered
-                    if   (self.cmd_cnt <= 8):
-                        self.command = self.command | (self.bit << self.cmd_cnt)
-                    elif (self.cmd_cnt == 8):
+                    if   (self.bit_cnt <= 8):
+                        self.command = self.command | (self.bit << self.bit_cnt)
+                    elif (self.bit_cnt == 8):
                         if (self.command in [0x3c, 0x69]):
                             self.put(self.fall, self.cnt_bit[self.overdrive], self.out_ann, [0, ['ENTER OVERDRIVE MODE']])
                     # incrementing the bit counter
@@ -195,7 +196,7 @@ class Decoder(srd.Decoder):
                         # Exit overdrive mode
                         self.put(self.fall, self.cnt_bit[self.overdrive], self.out_ann, [0, ['EXIT OVERDRIVE MODE']])
                         self.overdrive = 0
-                        self.cmd_cnt = 0
+                        self.bit_cnt = 0
                         self.command = 0
                     elif ((self.samplenum - self.fall > self.cnt_overdrive_reset) and (self.overdrive)):
                         # Save the sample number for the falling edge.
diff --git a/decoders/onewire_network/Makefile.am b/decoders/onewire_network/Makefile.am
index 17b3b04..2484987 100644
--- a/decoders/onewire_network/Makefile.am
+++ b/decoders/onewire_network/Makefile.am
@@ -18,9 +18,9 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
-pkgdatadir = $(DECODERS_DIR)/onewire
+pkgdatadir = $(DECODERS_DIR)/onewire_network
 
-dist_pkgdata_DATA = __init__.py onewire_link.py onewire_network.py
+dist_pkgdata_DATA = __init__.py onewire_network.py
 
 CLEANFILES = *.pyc
 
diff --git a/decoders/onewire_network/__init__.py b/decoders/onewire_network/__init__.py
index 0a712ef..991919f 100644
--- a/decoders/onewire_network/__init__.py
+++ b/decoders/onewire_network/__init__.py
@@ -73,6 +73,4 @@ TODO:
 - define output protocol
 '''
 
-from .onewire_link    import *
 from .onewire_network import *
-
diff --git a/decoders/onewire_network/onewire_network.py b/decoders/onewire_network/onewire_network.py
index 836bce9..5587f97 100644
--- a/decoders/onewire_network/onewire_network.py
+++ b/decoders/onewire_network/onewire_network.py
@@ -77,14 +77,14 @@ class Decoder(srd.Decoder):
         [code, val] = data
 
         # State machine.
-        if (self.code == "RESET"):
+        if (code == "RESET"):
             self.state = "COMMAND"
             self.search = "P"
             self.bit_cnt = 0
-        elif (self.code == "BIT"):
+        elif (code == "BIT"):
             if (self.state == "COMMAND"):
                 # Receiving and decoding a ROM command
-                if (self.onewire_collect(8, val)):
+                if (self.onewire_collect(8, val, ss, es)):
                     self.put(self.net_beg, self.net_end, self.out_ann, [ANN_NETWORK,
                       ['ROM COMMAND: 0x%02x \'%s\'' % (self.data, rom_command[self.data])]])
                     if   (self.data == 0x33):  # READ ROM
@@ -106,20 +106,20 @@ class Decoder(srd.Decoder):
             elif (self.state == "GET ROM"):
                 # A 64 bit device address is selected
                 # family code (1B) + serial number (6B) + CRC (1B)
-                if (self.onewire_collect(64, val)):
+                if (self.onewire_collect(64, val, ss, es)):
                     self.net_rom = self.data & 0xffffffffffffffff
                     self.put(self.net_beg, self.net_end, self.out_ann, [ANN_NETWORK, ['ROM: 0x%016x' % self.net_rom]])
                     self.state = "TRANSPORT"
             elif (self.state == "SEARCH ROM"):
                 # A 64 bit device address is searched for
                 # family code (1B) + serial number (6B) + CRC (1B)
-                if (self.onewire_search(64)):
+                if (self.onewire_search(64, val, ss, es)):
                     self.net_rom = self.data & 0xffffffffffffffff
                     self.put(self.net_beg, self.net_end, self.out_ann, [ANN_NETWORK, ['ROM: 0x%016x' % self.net_rom]])
                     self.state = "TRANSPORT"
             elif (self.state == "TRANSPORT"):
                 # The transport layer is handled in byte sized units
-                if (self.onewire_collect(8, val)):
+                if (self.onewire_collect(8, val, ss, es)):
                     self.put(self.net_beg, self.net_end, self.out_ann, [ANN_NETWORK  , ['TRANSPORT: 0x%02x' % self.data]])
                     self.put(self.net_beg, self.net_end, self.out_ann, [ANN_TRANSPORT, ['TRANSPORT: 0x%02x' % self.data]])
                     self.put(self.net_beg, self.net_end, self.out_proto, ['transfer', self.data])
@@ -129,16 +129,16 @@ class Decoder(srd.Decoder):
 
 
     # Link/Network layer data collector
-    def onewire_collect (self, length, val):
+    def onewire_collect (self, length, val, ss, es):
         # Storing the sampe this sequence begins with
         if (self.bit_cnt == 1):
-            self.net_beg = self.ss
+            self.net_beg = ss
         self.data = self.data & ~(1 << self.bit_cnt) | (val << self.bit_cnt)
         self.bit_cnt  = self.bit_cnt + 1
         # Storing the sampe this sequence ends with
         # In case the full length of the sequence is received, return 1
         if (self.bit_cnt == length):
-            self.net_end  = self.es
+            self.net_end  = es
             self.data = self.data & ((1<<length)-1)
             self.bit_cnt  = 0
             return (1)
@@ -146,10 +146,10 @@ class Decoder(srd.Decoder):
             return (0)
 
     # Link/Network layer search collector
-    def onewire_search (self, length):
+    def onewire_search (self, length, val, ss, es):
         # Storing the sampe this sequence begins with
         if ((self.bit_cnt == 0) and (self.search == "P")):
-            self.net_beg = self.ss
+            self.net_beg = ss
         # Master receives an original address bit
         if   (self.search == "P"):
           self.data_p = self.data_p & ~(1 << self.bit_cnt) | (val << self.bit_cnt)
@@ -166,7 +166,7 @@ class Decoder(srd.Decoder):
         # Storing the sampe this sequence ends with
         # In case the full length of the sequence is received, return 1
         if (self.bit_cnt == length):
-            self.net_end = self.es
+            self.net_end = es
             self.data_p = self.data_p & ((1<<length)-1)
             self.data_n = self.data_n & ((1<<length)-1)
             self.data   = self.data   & ((1<<length)-1)