Rename 'probe' to 'channel' everywhere.

Variables of type 'struct srd_channel *' are consistently named 'pdch' to
make them easily distinguishable from libsigrok's 'struct sr_channel *'
variables that are consistently named 'ch'.

2 files changed, 7 insertions, 7 deletions

diff --git a/decoders/parallel/__init__.py b/decoders/parallel/__init__.py
index ea55077..cc1f3d1 100644
--- a/decoders/parallel/__init__.py
+++ b/decoders/parallel/__init__.py
@@ -20,14 +20,14 @@
 
 '''
 This protocol decoder can decode synchronous parallel buses with various
-number of data bits/probes and one (optional) clock line.
+number of data bits/channels and one (optional) clock line.
 
 If no clock line is supplied, the decoder works slightly differently in
-that it interprets every transition on any of the supplied data probes
+that it interprets every transition on any of the supplied data channels
 like there had been a clock transition.
 
-It is required to use the lowest data probes, and use consecutive ones.
-For example, for a 4-bit sync parallel bus, probes D0/D1/D2/D3 (and CLK)
+It is required to use the lowest data channels, and use consecutive ones.
+For example, for a 4-bit sync parallel bus, channels D0/D1/D2/D3 (and CLK)
 should be used. Using combinations like D7/D12/D3/D15 is not supported.
 For an 8-bit bus you should use D0-D7, for a 16-bit bus use D0-D15 and so on.
 '''
diff --git a/decoders/parallel/pd.py b/decoders/parallel/pd.py
index 330d514..094b12a 100644
--- a/decoders/parallel/pd.py
+++ b/decoders/parallel/pd.py
@@ -54,9 +54,9 @@ Packet:
    word <worditemcount> is 7, and so on.
 '''
 
-def probe_list(num_probes):
+def channel_list(num_channels):
     l = [{'id': 'clk', 'name': 'CLK', 'desc': 'Clock line'}]
-    for i in range(num_probes):
+    for i in range(num_channels):
         d = {'id': 'd%d' % i, 'name': 'D%d' % i, 'desc': 'Data line %d' % i}
         l.append(d)
     return tuple(l)
@@ -70,7 +70,7 @@ class Decoder(srd.Decoder):
     license = 'gplv2+'
     inputs = ['logic']
     outputs = ['parallel']
-    optional_probes = probe_list(8)
+    optional_channels = channel_list(8)
     options = (
         {'id': 'clock_edge', 'desc': 'Clock edge to sample on',
             'default': 'rising', 'values': ('rising', 'falling')},