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authorSoeren Apel <soeren@apelpie.net>2020-03-26 16:02:36 +0100
committerSoeren Apel <soeren@apelpie.net>2021-02-13 22:40:15 +0100
commit9b6c0354ce4bab15c524928f2c0059f1df543ad9 (patch)
tree9d94b8a23dd2167cf7dd52a2f716b90032f458b2 /decoders/dmx512/__init__.py
parent460e6cfa5d45c8d2ba0f5be1235ab31d4ec9508b (diff)
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pca9571/tca6408a: Rework logic output
For now, libsigrokdecode clients expect to receive a 1:1 number of input samples to logic output samples, along with a logic output samplerate equal to the PD's input sample rate
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