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author | Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com> | 2014-11-13 15:50:43 -0500 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2014-11-23 22:33:00 +0100 |
commit | 5f987d6f312a7a586b0af5aca267b98747e5df4a (patch) | |
tree | 8e010274800145fe30647fab79fb96d1134eb218 | |
parent | 961699aaab1e44dab827c9f1884100b87a0a97fd (diff) | |
download | libsigrokdecode-5f987d6f312a7a586b0af5aca267b98747e5df4a.tar.gz libsigrokdecode-5f987d6f312a7a586b0af5aca267b98747e5df4a.zip |
jitter: add a binary output to report the raw jitter value.
Signed-off-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
-rw-r--r-- | decoders/jitter/pd.py | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/decoders/jitter/pd.py b/decoders/jitter/pd.py index 0ddeea5..b5e3a29 100644 --- a/decoders/jitter/pd.py +++ b/decoders/jitter/pd.py @@ -59,6 +59,9 @@ class Decoder(srd.Decoder): ('clk_missed', 'Clock missed', (1,)), ('sig_missed', 'Signal missed', (2,)), ) + binary = ( + ('jitter', 'Raw jitter values'), + ) def __init__(self, **kwargs): self.state = 'CLK' @@ -74,6 +77,7 @@ class Decoder(srd.Decoder): self.clk_edge = edge_detector[self.options['clk_polarity']] self.sig_edge = edge_detector[self.options['sig_polarity']] self.out_ann = self.register(srd.OUTPUT_ANN) + self.out_bin = self.register(srd.OUTPUT_BINARY) self.out_clk_missed = self.register(srd.OUTPUT_META, meta=(int, 'Clock missed', 'Clock transition missed')) self.out_sig_missed = self.register(srd.OUTPUT_META, @@ -101,6 +105,15 @@ class Decoder(srd.Decoder): self.put(self.clk_start, self.sig_start, self.out_ann, [0, [delta_s]]) + # Helper function for raw jitter value which could be useful for statistics. + def putb(self, delta): + if delta is None: + return + # format the delta to an ascii output + for x in str(delta): + self.put(self.clk_start, self.sig_start, self.out_bin, (0, bytes([ord(x)]))) + self.put(self.clk_start, self.sig_start, self.out_bin, (0, bytes([ord('\n')]))) + # Helper function for missed clock and signal annotations. def putm(self, data): self.put(self.samplenum, self.samplenum, self.out_ann, data) @@ -144,7 +157,9 @@ class Decoder(srd.Decoder): self.sig_start = self.samplenum self.state = 'CLK' # Calculate and report the timing jitter. - self.putx((self.sig_start - self.clk_start) / self.samplerate) + delta = (self.sig_start - self.clk_start) / self.samplerate + self.putx(delta) + self.putb(delta) return False else: if self.clk_start != self.samplenum \ |