blob: 90e87809ddbe0b1236e312b416302e255903492f (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
|
-------------------------------------------------------------------------------
SPI / Atmel ATMEGA32
-------------------------------------------------------------------------------
This is a set of SPI captures from an Atmel ATMEGA32 device. The main loop of
the C program outputs an 8-bit value which is increased by one between
subsequent transmissions:
unsigned char c = 0;
for (;;) {
_delay_us(250);
cbi(PORTB, DD_SS);
SPDR = c;
c++;
while (!(SPSR & (1 << SPIF)));
sbi(PORTB, DD_SS);
}
Logic analyzer setup
--------------------
The logic analyzer used was a Saleae Logic (at 500kHz).
Probe ATMEGA32 pins (PDIP-40)
---------------------------------
0 (CS) SS/PB4 (Pin 5)
1 (MOSI) MOSI/PB5 (Pin 6)
2 (SCK) SCK/PB7 (Pin 8)
Probing
-------
The sigrok command line used was:
sigrok-cli --driver fx2lafw --samples=1m --config samplerate=500k -o <file>
SPI setup
---------
There are 4 different SPI setups each captured in a separate capture file
(see the ATMEGA datasheet for the meaning of the CPOL & CPHA flags).
spi_atmega32_00.sr
------------------
SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0)|(1<<SPR1);
spi_atmega32_11.sr
------------------
SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0)|(1<<SPR1) | (1<<CPOL) | (1<<CPHA);
spi_atmega32_01.sr
------------------
SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0)|(1<<SPR1) | (1<<CPHA);
spi_atmega32_10.sr
------------------
SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0)|(1<<SPR1) | (1<<CPOL);
|
