summaryrefslogtreecommitdiff
path: root/i2s/2ch-16bit-16khz/README
blob: 2c24397ce912c1ff24c9c8701c71d587fa1b7b4b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
-------------------------------------------------------------------------------
I2S Master 2-channel 16-bit 16-kHz
-------------------------------------------------------------------------------

This is an example of an I2S master with a playing a recording of the BBC
shipping forecast through one channel, and the other channel disconnected.

Logic analyzer setup
--------------------

The logic analyzer used for capturing was a EE Electronics ESLA201A at a 
sample rate of 16MHz. The logic analyzer probes were connected to the I2S
pins like this:

  Probe       Signal
  ------------------------
  0           Clock
  1           Frame Select
  2           Data