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-------------------------------------------------------------------------------
Dallas DS1307 RTC Clock
-------------------------------------------------------------------------------
This is a capture of data ouput from a Dallas DS1307 RTC module using:
- hwclock -f /dev/rtc1 --systohc && { while true; hwclock -f /dev/rtc1; done }
Details:
- DS1307 datasheet: http://sparkfun.com/datasheets/Components/DS1307.pdf
A. Logic analyzer setup
-----------------------
The logic analyzer used was Open Bench Logic Sniffer (at 200kHz):
Probe DS1307 pin
-------------------------
0 SCL
1 SDA
rtc_ds1307_200khz_*.sr
----------------------
This is what the decoded data should look like:
- Setting the date/time:
S Wr:0x68 A 0x16 A 0x35 A 0x18 A 0x01 A 0x10 A 0x03 A 0x13 A P
- Reading the current date/time:
S Wr:0x68 A 0x00 A Sr Rd:0x68 A 0x16 A 0x35 A 0x18 A 0x01 A 0x10 A
0x03 A 0x13 N P
- The abbreviations used above: S = Start, Wr = Write, A = ACK, P = Stop,
Sr = Repeated start, Rd = Read, N = NACK
The sigrok command line used was:
sigrok-cli --driver=ols:conn=/dev/ttyACM0 -d samplerate=200khz \
--samples=24576 -p 0=SCL,1=SDA --triggers SDA=0 -o <filename>
B. Logic analyzer setup
-----------------------
The logic analyzer used is a Saleae Logic clone (at 500kHz):
Probe DS1307 pin
-------------------------
D0 (CH1) SCL
D1 (CH2) SDA
The sigrok 0.7.1 command line used:
sigrok-cli --driver fx2lafw --channels D0=CLK,D1=DATA \
--config samplerate=500khz:captureratio=1 --samples 1000 \
--triggers CLK=1,DATA=f --output-file <filename>
rtc_ds1307_500khz_sqw32khz_mode12h_pm.sr
----------------------------------------
The file provides reading of time keeping registers as well as control register
of the RTC chip, which was setup to 12-hours mode, time with PM flag, and
square wave frequency 32768 Hz before in order to demonstrate bugfixes
in the following GitHub pull request for libsigrokdecode
(merged as b3f6033022006c8f4ee88a70155f3571bee1a2ca):
https://github.com/sigrokproject/libsigrokdecode/pull/10
|
