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+-------------------------------------------------------------------------------
+SWD
+-------------------------------------------------------------------------------
+
+This is a set of example captures of the ARM SWD (version 1) protocol.
+
+Details:
+http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ihi0031c/index.html
+(Registration required)
+
+
+Logic analyzer setup
+--------------------
+
+  Probe       SWD
+  ---------------
+  0           swclk
+  1           swdio
+
+
+Data
+----
+
+Different SWD sessions showing different types of behaviour:
+
+* ftdi_openocd/
+
+Using an FTDI-based adapter via "openocd ftdi resistor hack". OpenOCD
+0.9.0 development version. Device under test is a Nordic nRF51822.
+
+Command line:
+
+  $ openocd -f interface/ftdi/olimex-arm-usb-tiny-h.cfg \
+            -f interface/ftdi/swd-resistor-hack.cfg \
+            -f target/nrf51.cfg
+
+** ftdi_openocd/init.sr
+   Initialising device, IDCODE read, etc.
+   OpenOCD args: -c "init; exit"
+
+** ftdi_openocd/init_noreply.sr
+   Initialising when no device is connected (i.e. all responses are 1s.)
+   OpenOCD args: -c "init; exit"
+
+** ftdi_openocd/init_write_0xabbabeeb.sr
+   Initialise, write 20 bytes of 0xabbabeeb at start of RAM.
+   OpenOCD args: -c "init; halt; mww 0x20000000 0xabbabeeb 20; exit"
+
+** ftdi_openocd/init_wait_fault.sr
+   Initialise, attempt to write flash fill of 0xabbabeeb via async loader.
+   This causes SWD WAIT states in "overrun" mode, so the first WAIT causes all
+   subsequent responses to be FAULT until OpenOCD clears the sticky error bit.
+
+   For this capture OpenOCD was patched with this change (known to induce
+   SWD WAITs): http://openocd.zylin.com/#/c/2204/
+
+   OpenOCD args: -c "init; reset halt; flash fillw 0 0xabbabeeb 2048; exit"
+
+
+* stlink_openocd/
+
+Using an STLINK-V2 adapter via OpenOCD 0.9.0 development
+version. Device under test is a Nordic nRF51822.
+
+Command line:
+
+  $ openocd -f interface/stlink-v2.cfg -c 'transport select hla_swd' \
+            -f target/nrf51.cfg
+
+** stlink_openocd/init.sr
+   Intiliasing device, IDCODE read, etc.
+   OpenOCD args: -c "init; exit"
+
+** stlink_openocd/init_write_0xabbabeeb.sr
+   Initialise, write 20 bytes of 0xabbabeeb at start of RAM.
+   OpenOCD args: -c "init; halt; mww 0x20000000 0xabbabeeb 20; exit"
+
+** stlink_openocd/wait_retry.sr
+   Capture showing an SWD WAIT with overrun mode not enabled (in contrast to
+   ftdi_openocd/wait_retry.sr), adapter immediately retries and gets an OK
+   response.
+
+   For this capture OpenOCD was patched with this change (known to induce
+   SWD WAITs): http://openocd.zylin.com/#/c/2204/
+
+   OpenOCD args: -c "init; reset halt; flash fillw 0 0xabbabeeb 2048; exit"
+