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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2018-01-26 19:47:44 +0100 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2018-01-26 19:47:44 +0100 |
| commit | d53db98d513dc13dbc75c1d1ca416b2b33e66ae9 (patch) | |
| tree | 168a1628d5e70940b5d6d761f35cf0276ad91af6 /spi/spiflash/fidelix_fm25q32/cmd/0x02_32bytes.sr | |
| parent | df6f9c7271110e911c029b08a3e70d5d6580f1f4 (diff) | |
| download | sigrok-dumps-d53db98d513dc13dbc75c1d1ca416b2b33e66ae9.tar.gz sigrok-dumps-d53db98d513dc13dbc75c1d1ca416b2b33e66ae9.zip | |
uart: Add some flow control (RTS#) examples.
The sender (incorrectly) transmits one or more excess bytes after RTS#
has been pulled high by the receiver. This is not a problem in all cases
(e.g. when the receiver UART hardware buffer is larger than one byte).
Diffstat (limited to 'spi/spiflash/fidelix_fm25q32/cmd/0x02_32bytes.sr')
0 files changed, 0 insertions, 0 deletions