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author | Karl Palsson <karlp@tweak.net.au> | 2015-05-16 18:39:55 +0000 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2015-06-19 17:22:38 +0200 |
commit | 13c49dff638334c422b17de7f7d0c2c75f8d5af7 (patch) | |
tree | ce786c9a401f3df6b3a6cedea6b40b9896c9d107 /spi/adns5020/README | |
parent | 1775ec8b4efadd5db511b01ec6ec166ead2c7eed (diff) | |
download | sigrok-dumps-13c49dff638334c422b17de7f7d0c2c75f8d5af7.tar.gz sigrok-dumps-13c49dff638334c422b17de7f7d0c2c75f8d5af7.zip |
Add Avago ADNS-5020 optical mouse sensor dump.
Capture is from a gutted Dell optical mouse. Pins are named, capture is from
power on of the mouse controller, so captures initialization, as well as
operation.
Diffstat (limited to 'spi/adns5020/README')
-rw-r--r-- | spi/adns5020/README | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/spi/adns5020/README b/spi/adns5020/README new file mode 100644 index 0000000..23925f1 --- /dev/null +++ b/spi/adns5020/README @@ -0,0 +1,49 @@ +------------------------------------------------------------------------------- +Avago ADNS-5020 +------------------------------------------------------------------------------- + +This directory contains a capture of the communication between a Cypress +CY7C63813 and an Avago ADNS-5020 optical mouse sensor. + +This is the internals of a fairly generic Dell optical mouse. + +It is not nearly a complete sample of what types of traffic are possible, +specifically, it doesn't include a capture of "Burst Mode" traffic, which the +mouse firmware doesn't appear to use, even though Avago "highly recommends" +that burst mode be used for all devices. + + +adns5020-cy7c63813_init.sr +-------------------------- + +Captures the traffic from power on of the device (USB plug in) for 1 second. +Traces the initialization and reset pins as well as some general traffic. + + +Logic analyzer setup +-------------------- + +The logic analyzer used was a generic Saleae Logic clone (at 6MHz). + +Avago documents max speed as 1MHz. 6MHz is used to try and avoid catching +any glitches on CS. + + Probe Pin Description + -------------------------- + 0 VDD Used to trigger sampling + 3 SDIO Bidir, but we use the MOSI stack from SPI + 4 SCK SPI clock + 5 NCS Chip select + 6 NRESET Chip reset + 7 XY_LED Chip LED control, not used by this configuration + + +Data +---- + +The sigrok command line used was: + + sigrok-cli -d fx2lafw --config samplerate=6M --time 1s \ + -o adns5020-cy7c63813_init.sr -t VDD=r \ + --channels 3=SDIO,5=NCS,4=SCK,6=NRESET,7=XY_LED,0=VDD + |