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author | Uwe Hermann <uwe@hermann-uwe.de> | 2019-11-09 16:41:35 +0100 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2019-11-09 17:05:28 +0100 |
commit | f601acc1cf9c3093b880755b8e32580c570ff8ff (patch) | |
tree | 2bde6742990ece99cece8fbb0b79b2f024160e17 /microwire/microchip_93lc46b/README | |
parent | fab3e703c6f701ebdb1402e7675e852a94080d11 (diff) | |
download | sigrok-dumps-f601acc1cf9c3093b880755b8e32580c570ff8ff.tar.gz sigrok-dumps-f601acc1cf9c3093b880755b8e32580c570ff8ff.zip |
microwire: Add a Microchip 93LC46B dump.
Diffstat (limited to 'microwire/microchip_93lc46b/README')
-rw-r--r-- | microwire/microchip_93lc46b/README | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/microwire/microchip_93lc46b/README b/microwire/microchip_93lc46b/README new file mode 100644 index 0000000..773da8e --- /dev/null +++ b/microwire/microchip_93lc46b/README @@ -0,0 +1,27 @@ +------------------------------------------------------------------------------- +Microchip 93LC46B Microwire EEPROM +------------------------------------------------------------------------------- + +This is a set of example captures of the Microwire traffic from a +Microchip 93LC46B Microwire EEPROM to an FTDI FT232* chip on a random +unknown eval board. + +Details: +https://www.microchip.com/wwwproducts/en/93LC46B +http://ww1.microchip.com/downloads/en/DeviceDoc/20001749K.pdf + + +Logic analyzer setup +-------------------- + +The logic analyzer used was a CWAV USBee SX (at 8MHz): + + Probe 93LC46B pin + ----------------------- + 0 CS + 1 CLK + 2 DI + 3 DO + 4 ORG + +The ORG pin is tied high to use the x16 memory organisation (16-bit words). |