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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2012-04-19 19:04:35 +0200 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2012-04-19 19:04:35 +0200 |
| commit | 47cd3c8ff64cd43ddf47f5da497b88e30616b162 (patch) | |
| tree | 8444bb4685c8466920e414ba48cf7ae82e63c70c /i2s/2ch-16bit-16khz/README | |
| parent | f4298ac310a284590808a47d9e0d33ee449e15c4 (diff) | |
| download | sigrok-dumps-47cd3c8ff64cd43ddf47f5da497b88e30616b162.tar.gz sigrok-dumps-47cd3c8ff64cd43ddf47f5da497b88e30616b162.zip | |
READMEs: Cosmetics, consistency fixes, typos.
Diffstat (limited to 'i2s/2ch-16bit-16khz/README')
| -rw-r--r-- | i2s/2ch-16bit-16khz/README | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/i2s/2ch-16bit-16khz/README b/i2s/2ch-16bit-16khz/README index 5403a16..79aa873 100644 --- a/i2s/2ch-16bit-16khz/README +++ b/i2s/2ch-16bit-16khz/README @@ -2,18 +2,16 @@ I2S Master 2-channel 16-bit 16-kHz ------------------------------------------------------------------------------- -This is an example of an I2S master with a playing a recording of the BBC +This is an example of an I2S master playing a recording of the BBC shipping forecast through one channel, and the other channel disconnected. Logic analyzer setup -------------------- -The logic analyzer used for capturing was a EE Electronics ESLA201A at a -sample rate of 16MHz. The logic analyzer probes were connected to the I2S -pins like this: +The logic analyzer used was an EE Electronics ESLA201A (at 16MHz): - Probe Signal - ------------------------ + Probe I2S pin + ------------------- 0 Clock 1 Frame Select 2 Data |