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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2012-04-19 19:04:35 +0200 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2012-04-19 19:04:35 +0200 |
| commit | 47cd3c8ff64cd43ddf47f5da497b88e30616b162 (patch) | |
| tree | 8444bb4685c8466920e414ba48cf7ae82e63c70c /i2c/rtc_epson_8564je | |
| parent | f4298ac310a284590808a47d9e0d33ee449e15c4 (diff) | |
| download | sigrok-dumps-47cd3c8ff64cd43ddf47f5da497b88e30616b162.tar.gz sigrok-dumps-47cd3c8ff64cd43ddf47f5da497b88e30616b162.zip | |
READMEs: Cosmetics, consistency fixes, typos.
Diffstat (limited to 'i2c/rtc_epson_8564je')
| -rw-r--r-- | i2c/rtc_epson_8564je/README | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/i2c/rtc_epson_8564je/README b/i2c/rtc_epson_8564je/README index decf739..60cd075 100644 --- a/i2c/rtc_epson_8564je/README +++ b/i2c/rtc_epson_8564je/README @@ -9,8 +9,7 @@ which has a slave address of 0x51 (or 0xa2, if the read/write bit is included). Logic analyzer setup -------------------- -The logic analyzer used for capturing was a ChronoVu LA8 at a sample rate -of 1MHz. The logic analyzer probes were connected to the RTC chip like this: +The logic analyzer used was a ChronoVu LA8 (at 1MHz): Probe RTC chip pin ------------------------ |