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authorwhitequark <whitequark@whitequark.org>2018-05-21 16:11:06 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2018-05-21 18:18:20 +0200
commit204c0867d5e83c5d49e52030bc4fb04ae0c8d085 (patch)
treee1f62dc36c59dc0571fed30400e5e2f27190b105 /i2c/eeprom_24xx/onsemi_cat24c256
parent0da9f852aa47ae898dda89bbb7008987aaa94091 (diff)
downloadsigrok-dumps-204c0867d5e83c5d49e52030bc4fb04ae0c8d085.tar.gz
sigrok-dumps-204c0867d5e83c5d49e52030bc4fb04ae0c8d085.zip
Add ON Semi CAT24C256 example dump.
Diffstat (limited to 'i2c/eeprom_24xx/onsemi_cat24c256')
-rw-r--r--i2c/eeprom_24xx/onsemi_cat24c256/README31
-rw-r--r--i2c/eeprom_24xx/onsemi_cat24c256/glasgow-firmware-flash.srbin0 -> 94843 bytes
2 files changed, 31 insertions, 0 deletions
diff --git a/i2c/eeprom_24xx/onsemi_cat24c256/README b/i2c/eeprom_24xx/onsemi_cat24c256/README
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+-------------------------------------------------------------------------------
+ON Semi CAT24C256
+-------------------------------------------------------------------------------
+
+This is a set of example captures of ON Semi CAT24C256 I2C traffic.
+
+Details:
+http://www.onsemi.com/PowerSolutions/product.do?id=CAT24C256
+https://www.onsemi.com/pub/Collateral/CAT24C256-D.PDF
+https://github.com/whitequark/Glasgow
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was an mcupro Saleae 16 clone (at 2 MHz).
+
+ Probe I2C pin
+ -------------------
+ 0 (black) SCL
+ 1 (brown) SDA
+
+
+glasgow-firmware-flash.sr
+-------------------------
+
+This is the I2C communication of the FX2_MEM EEPROM being flashed with
+8051 firmware and then verified on a Glasgow board. Only the changed bytes are
+written, which is why there are two read sequences. The uneven pages are
+because of the EP0 buffer being limited to 64 bytes.
+
diff --git a/i2c/eeprom_24xx/onsemi_cat24c256/glasgow-firmware-flash.sr b/i2c/eeprom_24xx/onsemi_cat24c256/glasgow-firmware-flash.sr
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index 0000000..bfe63f5
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+++ b/i2c/eeprom_24xx/onsemi_cat24c256/glasgow-firmware-flash.sr
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