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authorUwe Hermann <uwe@hermann-uwe.de>2017-05-26 22:22:59 +0200
committerUwe Hermann <uwe@hermann-uwe.de>2017-05-26 22:22:59 +0200
commit44fbf09632f47b3dcfe573377ee550ea00c601df (patch)
tree246c53a70f692c5966e933bcb2a85607ba0dcd19 /i2c/eeprom_24xx/attiny13_i2c/README
parentcefb8a228437d78ca18395c8d317d31354f6bfe4 (diff)
downloadsigrok-dumps-44fbf09632f47b3dcfe573377ee550ea00c601df.tar.gz
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eeprom24xx: Add an ATtiny13 I²C example dump.
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+-------------------------------------------------------------------------------
+Atmel ATtiny13 I²C
+-------------------------------------------------------------------------------
+
+This is a set of example captures of the I²C traffic to/from the Atmel
+ATtiny13 chip and the Cypress FX2 in the Braintechnology USB-LPS device.
+
+Details:
+http://www.atmel.com/images/doc2535.pdf
+http://www.braintechnology.de/braintechnology/usb_lps.html
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a CWAV USBee SX (at 12MHz):
+
+ Probe ATtiny13 pin
+ ------------------------
+ 0 (black) PB0
+ 1 (brown) PB1/SDA
+ 2 (red) PB2/SCL
+ 3 (orange) PB3
+ 4 (yellow) PB4
+ 5 (green) PB5
+
+
+Data
+----
+
+The data contains the power-up sequence when the USB cable is attached.
+