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author | Uwe Hermann <uwe@hermann-uwe.de> | 2017-06-13 23:17:45 +0200 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2017-06-13 23:17:45 +0200 |
commit | 9dedb9588760a643e1e818161ff7907874544dfd (patch) | |
tree | 272ed128f1b1dd1a278091d0a5b0ec7d90a89942 /i2c/eeprom_24xx/atmel_at24c16c/README | |
parent | 5887a4815944d4f8029c0da45b981da88f23479b (diff) | |
download | sigrok-dumps-9dedb9588760a643e1e818161ff7907874544dfd.tar.gz sigrok-dumps-9dedb9588760a643e1e818161ff7907874544dfd.zip |
Add an Atmel AT24C16C dump (DreamSourceLab DSLogic).
Diffstat (limited to 'i2c/eeprom_24xx/atmel_at24c16c/README')
-rw-r--r-- | i2c/eeprom_24xx/atmel_at24c16c/README | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/i2c/eeprom_24xx/atmel_at24c16c/README b/i2c/eeprom_24xx/atmel_at24c16c/README new file mode 100644 index 0000000..f2d2305 --- /dev/null +++ b/i2c/eeprom_24xx/atmel_at24c16c/README @@ -0,0 +1,28 @@ +------------------------------------------------------------------------------- +Atmel AT24C16C +------------------------------------------------------------------------------- + +This is a set of example captures of Atmel AT24C16C I2C traffic. + +Details: +https://www.microchip.com/wwwproducts/en/AT24C16C +http://www.atmel.com/images/atmel-8719-seeprom-at24c16c-datasheet.pdf + + +Logic analyzer setup +-------------------- + +The logic analyzer used was a Saleae Logic (at 4MHz): + + Probe I2C pin + ------------------- + 0 (black) SCL + 1 (brown) SDA + 2 (red) WP + + +dreamsourcelab_dslogic_powerup.sr +--------------------------------- + +This is the I2C communication during powerup between the Cypress FX2 and the +Atmel AT24C16C in the DreamSourceLab DSLogic. |