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authorUwe Hermann <uwe@hermann-uwe.de>2012-04-19 18:24:59 +0200
committerUwe Hermann <uwe@hermann-uwe.de>2012-04-19 18:24:59 +0200
commit4c90e08ebf8ecf6e0b21c6a24281cfdfadf566af (patch)
tree01140ca32f3c8d6509028e66aeddb99ecf95867c /i2c/edid
parent8bf853f8bed543b864d9392a67b7c4b8a2f29563 (diff)
downloadsigrok-dumps-4c90e08ebf8ecf6e0b21c6a24281cfdfadf566af.tar.gz
sigrok-dumps-4c90e08ebf8ecf6e0b21c6a24281cfdfadf566af.zip
edid: Add some more docs in the README.
Diffstat (limited to 'i2c/edid')
-rw-r--r--i2c/edid/README30
1 files changed, 30 insertions, 0 deletions
diff --git a/i2c/edid/README b/i2c/edid/README
index 8c9ec32..52bcae9 100644
--- a/i2c/edid/README
+++ b/i2c/edid/README
@@ -1,3 +1,7 @@
+-------------------------------------------------------------------------------
+EDID
+-------------------------------------------------------------------------------
+
The captures in this directory were taken from a VGA cable, connected to
various displays, as the EDID data was sent across the I2C bus.
@@ -5,3 +9,29 @@ To decode these, set up a protocol decoder stack like this:
i2c -> ddc -> edid
+Details:
+https://en.wikipedia.org/wiki/Extended_display_identification_data
+https://en.wikipedia.org/wiki/Display_Data_Channel
+
+
+samsung_le46b620r3p.sr / samsung_syncmaster245b.sr
+--------------------------------------------------
+
+The logic analyzer used was a Saleae Logic at 500kHz:
+
+ Probe I2C pins
+ --------------------
+ 1 (black) SDA
+ 2 (brown) SCL
+
+
+samsung_syncmaster203b.sr
+-------------------------
+
+The logic analyzer used was a Saleae Logic at 1MHz:
+
+ Probe I2C pins
+ --------------------
+ 1 (black) SCL
+ 2 (brown) SDA
+