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authorUwe Hermann <uwe@hermann-uwe.de>2012-04-19 19:04:35 +0200
committerUwe Hermann <uwe@hermann-uwe.de>2012-04-19 19:04:35 +0200
commit47cd3c8ff64cd43ddf47f5da497b88e30616b162 (patch)
tree8444bb4685c8466920e414ba48cf7ae82e63c70c /i2c/edid
parentf4298ac310a284590808a47d9e0d33ee449e15c4 (diff)
downloadsigrok-dumps-47cd3c8ff64cd43ddf47f5da497b88e30616b162.tar.gz
sigrok-dumps-47cd3c8ff64cd43ddf47f5da497b88e30616b162.zip
READMEs: Cosmetics, consistency fixes, typos.
Diffstat (limited to 'i2c/edid')
-rw-r--r--i2c/edid/README12
1 files changed, 6 insertions, 6 deletions
diff --git a/i2c/edid/README b/i2c/edid/README
index d8d9795..c49a9ea 100644
--- a/i2c/edid/README
+++ b/i2c/edid/README
@@ -17,10 +17,10 @@ https://en.wikipedia.org/wiki/Display_Data_Channel
samsung_le46b620r3p.sr / samsung_syncmaster245b.sr
--------------------------------------------------
-The logic analyzer used was a Saleae Logic at 500kHz:
+The logic analyzer used was a Saleae Logic (at 500kHz):
- Probe I2C pins
- --------------------
+ Probe I2C pin
+ -------------------
1 (black) SDA
2 (brown) SCL
@@ -28,10 +28,10 @@ The logic analyzer used was a Saleae Logic at 500kHz:
samsung_syncmaster203b.sr
-------------------------
-The logic analyzer used was a Saleae Logic at 1MHz:
+The logic analyzer used was a Saleae Logic (at 1MHz):
- Probe I2C pins
- --------------------
+ Probe I2C pin
+ -------------------
1 (black) SCL
2 (brown) SDA