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authorUwe Hermann <uwe@hermann-uwe.de>2012-04-19 19:04:35 +0200
committerUwe Hermann <uwe@hermann-uwe.de>2012-04-19 19:04:35 +0200
commit47cd3c8ff64cd43ddf47f5da497b88e30616b162 (patch)
tree8444bb4685c8466920e414ba48cf7ae82e63c70c /i2c/a2_dummy_write/README
parentf4298ac310a284590808a47d9e0d33ee449e15c4 (diff)
downloadsigrok-dumps-47cd3c8ff64cd43ddf47f5da497b88e30616b162.tar.gz
sigrok-dumps-47cd3c8ff64cd43ddf47f5da497b88e30616b162.zip
READMEs: Cosmetics, consistency fixes, typos.
Diffstat (limited to 'i2c/a2_dummy_write/README')
-rw-r--r--i2c/a2_dummy_write/README7
1 files changed, 3 insertions, 4 deletions
diff --git a/i2c/a2_dummy_write/README b/i2c/a2_dummy_write/README
index 73e9b88..9bd37f7 100644
--- a/i2c/a2_dummy_write/README
+++ b/i2c/a2_dummy_write/README
@@ -3,15 +3,14 @@ Dummy I2C writes
-------------------------------------------------------------------------------
This an example capture of some dummy I2C traffic, where the master writes
-to a slave at address 0x51 (or 0x2a, if the read/write bit is included)
-in an infinite loop. The slave does not respond.
+to a slave (an RTC) at address 0x51 (or 0x2a, if the read/write bit is
+included) in an infinite loop. The slave does not respond.
Logic analyzer setup
--------------------
-The logic analyzer used for capturing was a ChronoVu LA8 at a sample rate
-of 1MHz. The logic analyzer probes were connected to the I2C pins like this:
+The logic analyzer used was a ChronoVu LA8 (at 1MHz):
Probe RTC chip pin
------------------------