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author | BenediktO <benedikt_o@web.de> | 2019-12-22 10:09:42 +0100 |
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committer | Gerhard Sittig <gerhard.sittig@gmx.net> | 2020-08-30 13:26:59 +0200 |
commit | 455bdc6edec647ef3147eec4291ecf6a0fba74e4 (patch) | |
tree | 5411da8b3c1723d683461c40aeaaf851899ee400 /dcc/easycontrol/README | |
parent | 91e85d43a637083c9d9839d0566a2698a2100d44 (diff) | |
download | sigrok-dumps-455bdc6edec647ef3147eec4291ecf6a0fba74e4.tar.gz sigrok-dumps-455bdc6edec647ef3147eec4291ecf6a0fba74e4.zip |
dcc: Add captures for DCC model railway control
[ gsi: README nits ]
Diffstat (limited to 'dcc/easycontrol/README')
-rw-r--r-- | dcc/easycontrol/README | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/dcc/easycontrol/README b/dcc/easycontrol/README new file mode 100644 index 0000000..72699c3 --- /dev/null +++ b/dcc/easycontrol/README @@ -0,0 +1,34 @@ +------------------------------------------------------------------------------- +DCC model train captures +------------------------------------------------------------------------------- + +These captures contain data that was recorded on a model railway setup that +is based on the tams elektronik EasyControl controller. The booster used was +a self-built tams elektronik B-2 booster. + + +Logic analyzer setup +-------------------- + +The logic analyzer used was a Saleae Logic clone (samplerate 1MHz). The +signal was captured via a simple voltage clamping circuit. + + Probe DCC + ------------------- + 1 Data + + +Captures +-------- + +Since the controller continuously resends the data, the captures do +contain more than what is stated here. + + Capture Action + ---------------------------------------------------------------------- + decoder_2_light.sr switch light on train with address 2 + decoder_45_light.sr switch light on train with address 45 + decoder_120_121.sr switch state of decoder 120, 121 + decoder_133.sr switch state of decoder 133 + decoder_140.sr switch state of decoder 140 + decoder_310.sr switch state of decoder 310 |