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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2019-04-30 19:17:10 +0200 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2019-04-30 22:23:14 +0200 |
| commit | c7692e182af6f603db6511ebae5109723cab42f1 (patch) | |
| tree | e320b90759e0a279a4862ed20ee3b73f48fa7db1 | |
| parent | d8a0e7a8001659ad69f9b556e97563560738c967 (diff) | |
| download | sigrok-dumps-c7692e182af6f603db6511ebae5109723cab42f1.tar.gz sigrok-dumps-c7692e182af6f603db6511ebae5109723cab42f1.zip | |
Rename 2ch-16bit-16khz to 2ch-32bit-8khz.
https://github.com/sigrokproject/libsigrokdecode/pull/6#issuecomment-442025810
| -rw-r--r-- | i2s/2ch-32bit-8khz/2ch-32bit-8khz-no-samplerate.sr (renamed from i2s/2ch-16bit-16khz/2ch-16bit-16khz-no-samplerate.sr) | bin | 14465 -> 14465 bytes | |||
| -rw-r--r-- | i2s/2ch-32bit-8khz/2ch-32bit-8khz.sr (renamed from i2s/2ch-16bit-16khz/2ch-16bit-16khz.sr) | bin | 139351 -> 139351 bytes | |||
| -rw-r--r-- | i2s/2ch-32bit-8khz/README (renamed from i2s/2ch-16bit-16khz/README) | 4 |
3 files changed, 2 insertions, 2 deletions
diff --git a/i2s/2ch-16bit-16khz/2ch-16bit-16khz-no-samplerate.sr b/i2s/2ch-32bit-8khz/2ch-32bit-8khz-no-samplerate.sr Binary files differindex 6db850e..6db850e 100644 --- a/i2s/2ch-16bit-16khz/2ch-16bit-16khz-no-samplerate.sr +++ b/i2s/2ch-32bit-8khz/2ch-32bit-8khz-no-samplerate.sr diff --git a/i2s/2ch-16bit-16khz/2ch-16bit-16khz.sr b/i2s/2ch-32bit-8khz/2ch-32bit-8khz.sr Binary files differindex 1975b87..1975b87 100644 --- a/i2s/2ch-16bit-16khz/2ch-16bit-16khz.sr +++ b/i2s/2ch-32bit-8khz/2ch-32bit-8khz.sr diff --git a/i2s/2ch-16bit-16khz/README b/i2s/2ch-32bit-8khz/README index 7cf3a8c..c629dc4 100644 --- a/i2s/2ch-16bit-16khz/README +++ b/i2s/2ch-32bit-8khz/README @@ -1,10 +1,11 @@ ------------------------------------------------------------------------------- -I2S Master 2-channel 16-bit 16-kHz +I2S Master 2-channel 32-bit 8-kHz ------------------------------------------------------------------------------- This is an example of an I2S master playing a recording of the BBC shipping forecast through one channel, and the other channel disconnected. + Logic analyzer setup -------------------- @@ -15,4 +16,3 @@ The logic analyzer used was an EE Electronics ESLA201A (at 12MHz): 0 Clock 1 Frame Select 2 Data - |