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Introduce a protocol decoder for the GM VPW 1x and 4x Vehicle Bus
(SAE J1850, or VPW for variable pulse width).
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Do track the RX and TX information, including their bus IDs. Present bus
numbers as dotted quads. Emit another summary annotation for completed
frames which presents receiver, transmitter, payload, and ACK details at
even higher zoom levels. Rename the last remaining "init CRC" instance
for consistency.
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Since the spec is vague on the subject, and real world captures were
found to occassionally run on odd clocks, internally prepare to inspect
traffic and interpret its content although the input data is invalid in
the strictest sense. Keep this hack internal, don't suggest to users
that invalid traffic would be perfectly acceptable.
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Rename 'pjon-link' to 'pjon_link' for consistency with other decoders.
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Introduce a protocol decoder which accepts 'pjon-link' Python input and
interprets PJON frames. The implementation is assumed to be operational
but most of the protocol's flexibility (optionally present and variable
width fields) has not yet been tested due to lack of example captures.
During development of the PJON decoder only the PJDL link layer decoder
was available, other link layers were not tested.
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Introduce a protocol decoder which generates 'pjon-link' output from
'logic' input by interpreting the PJDL single wire serial communication
link layer of the PJON protocol stack. This decoder extracts frame
markers, data bytes, as well as their pad/sync decoration. Inspection of
data values, or checks for frame validity remain the responsibility of a
stacked decoder which is shared among several link layer types.
This implementation "violates" the PJDL spec in those places where the
spec is incomplete or vague, and real world traffic would not decode at
all when the strict letter of the spec is applied instead of its spirit.
When in doubt, the decoder implementation errs to the usability side.
Carrier sense detection is incomplete in this version. Data extraction
works for all currently available captures. Recovery from synchronization
loss after glitches is acceptable. Glitch filtering is missing (the spec
is silent on this subject).
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Improve processing time by appending bits
instead of inserting them to the lists.
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Drop the 0x prefix for each byte in annotations (for improved readability).
Also, use 02X instead of 02x (printf-style formats).
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If those are useful for the decoder user, they should be annotations
using the Ann.WARN annotation class.
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On the Data row, the content of the single-byte registers is decoded as
follows: '<Meaning> <Value> <Unit>'. Initially, the meaning for these
registers was misplaced. This commit updates these meanings as they
really are.
Signed-off-by: Teo Perisanu <Teo.Perisanu@analog.com>
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Signed-off-by: Teo Perisanu <Teo.Perisanu@analog.com>
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Signed-off-by: Teo Perisanu <Teo.Perisanu@analog.com>
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Drop the pure channel "marking" annotations, they're unneeded.
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Since recent libsigrokdecode changes, annotation classes and rows must
not have overlapping IDs.
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Signed-off-by: Teo Perisanu <Teo.Perisanu@analog.com>
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The 'part' option is renamed to 'chip' (and 'ref' to 'vref') to be more
consistent with the naming used in other decoders.
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All annotation classes are on the same row anyway, and the row name
"LTC26x7 data" isn't all that much more useful than no row name at all.
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Signed-off-by: Teo Perisanu <Teo.Perisanu@analog.com>
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According to the datasheet, this should be 1.25 (ms/LSB).
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Signed-off-by: Teo Perisanu <Teo.Perisanu@analog.com>
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This will allow for usage of different colors in UIs, and for
showing/hiding them independently in UIs.
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This also fixes the CURRENT_STATE and RSVD_TESTMODE fields, which are
not single-bit fields.
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