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@@ -24,38 +24,6 @@ I2C protocol decoder.
The Inter-Integrated Circuit (I2C) bus is a bidirectional, multi-master
bus using two signals (SCL = serial clock line, SDA = serial data line).
-There can be many devices on the same bus. Each device can potentially be
-master or slave (and that can change during runtime). Both slave and master
-can potentially play the transmitter or receiver role (this can also
-change at runtime).
-
-Possible maximum data rates:
- - Standard mode: 100 kbit/s
- - Fast mode: 400 kbit/s
- - Fast-mode Plus: 1 Mbit/s
- - High-speed mode: 3.4 Mbit/s
-
-START condition (S): SDA = falling, SCL = high
-Repeated START condition (Sr): same as S
-Data bit sampling: SCL = rising
-STOP condition (P): SDA = rising, SCL = high
-
-All data bytes on SDA are exactly 8 bits long (transmitted MSB-first).
-Each byte has to be followed by a 9th ACK/NACK bit. If that bit is low,
-that indicates an ACK, if it's high that indicates a NACK.
-
-After the first START condition, a master sends the device address of the
-slave it wants to talk to. Slave addresses are 7 bits long (MSB-first).
-After those 7 bits, a data direction bit is sent. If the bit is low that
-indicates a WRITE operation, if it's high that indicates a READ operation.
-
-Later an optional 10bit slave addressing scheme was added.
-
-Documentation:
-http://www.nxp.com/acrobat/literature/9398/39340011.pdf (v2.1 spec)
-http://www.nxp.com/acrobat/usermanuals/UM10204_3.pdf (v3 spec)
-http://en.wikipedia.org/wiki/I2C
-
Protocol output format:
I2C packet: