diff options
| -rw-r--r-- | decoders/ps2/pd.py | 37 |
1 files changed, 6 insertions, 31 deletions
diff --git a/decoders/ps2/pd.py b/decoders/ps2/pd.py index 58c4d84..1a7f0be 100644 --- a/decoders/ps2/pd.py +++ b/decoders/ps2/pd.py @@ -26,7 +26,7 @@ class Ann: Bit = namedtuple('Bit', 'val ss es') class Decoder(srd.Decoder): - api_version = 2 + api_version = 3 id = 'ps2' name = 'PS/2' longname = 'PS/2' @@ -54,10 +54,7 @@ class Decoder(srd.Decoder): def __init__(self): self.bits = [] - self.prev_pins = None - self.prev_clock = None self.samplenum = 0 - self.clock_was_high = False self.bitcount = 0 def start(self): @@ -114,30 +111,8 @@ class Decoder(srd.Decoder): self.bits, self.bitcount = [], 0 - def find_clk_edge(self, clock_pin, data_pin): - # Ignore sample if the clock pin hasn't changed. - if clock_pin == self.prev_clock: - return - self.prev_clock = clock_pin - - # Sample on falling clock edge. - if clock_pin == 1: - return - - # Found the correct clock edge, now get the bits. - self.handle_bits(data_pin) - - def decode(self, ss, es, data): - for (self.samplenum, pins) in data: - clock_pin, data_pin = pins[0], pins[1] - - # Ignore identical samples. - if self.prev_pins == pins: - continue - self.prev_pins = pins - - if clock_pin == 0 and not self.clock_was_high: - continue - self.clock_was_high = True - - self.find_clk_edge(clock_pin, data_pin) + def decode(self): + while True: + # Sample data bits on falling clock edge. + clock_pin, data_pin = self.wait({0: 'f'}) + self.handle_bits(data_pin) |