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-rw-r--r--decoders/spi.py16
1 files changed, 11 insertions, 5 deletions
diff --git a/decoders/spi.py b/decoders/spi.py
index 457abb5..0c98c1d 100644
--- a/decoders/spi.py
+++ b/decoders/spi.py
@@ -112,11 +112,17 @@ class Decoder(srd.Decoder):
if self.bitcount == 0:
self.start_sample = samplenum
- # Receive bit into our shift register.
- if mosi == 1:
- self.mosidata |= 1 << (7 - self.bitcount)
- if miso == 1:
- self.misodata |= 1 << (7 - self.bitcount)
+ # Receive MOSI bit into our shift register.
+ if self.bit_order == MSB_FIRST:
+ self.mosidata |= mosi << (7 - self.bitcount)
+ else:
+ self.mosidata |= mosi << self.bitcount
+
+ # Receive MISO bit into our shift register.
+ if self.bit_order == MSB_FIRST:
+ self.misodata |= miso << (7 - self.bitcount)
+ else:
+ self.misodata |= miso << self.bitcount
self.bitcount += 1