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authorUwe Hermann <uwe@hermann-uwe.de>2012-05-10 09:34:13 +0200
committerUwe Hermann <uwe@hermann-uwe.de>2012-05-10 09:34:13 +0200
commitdd93276bf6b7537b65cab270f66666bf23fbc585 (patch)
treed0aa8d6b59fcb742e07d293833bac3e3fd822320 /type_logic.c
parent29590b14fc508a0b951ea0b87e98f7741808bab0 (diff)
downloadlibsigrokdecode-dd93276bf6b7537b65cab270f66666bf23fbc585.tar.gz
libsigrokdecode-dd93276bf6b7537b65cab270f66666bf23fbc585.zip
srd: Support for one or more optional probes.
In the protocol decoder you always get all required probes, then _all_ optional probes in the list of probes in the decode() call. Example: (r1, r2, r3, o1, o2, o3, o4) = pins In this case r1-r3 are required probes, o1-o4 are optional probes. However, the value of valid/used/specified probes will be 0 or 1, whereas the value of probes that were not specified/assigned by the user will be (at the moment) 42. The PD can check for a valid probe like this: if p in (0, 1): ... Or check for an invalid probe: if (p > 1): ... The value of 42 could change to be -1 or None later.
Diffstat (limited to 'type_logic.c')
-rw-r--r--type_logic.c17
1 files changed, 16 insertions, 1 deletions
diff --git a/type_logic.c b/type_logic.c
index b284ebf..098e34d 100644
--- a/type_logic.c
+++ b/type_logic.c
@@ -45,11 +45,26 @@ static PyObject *srd_logic_iternext(PyObject *self)
* Convert the bit-packed sample to an array of bytes, with only 0x01
* and 0x00 values, so the PD doesn't need to do any bitshifting.
*/
+
+ /* Get probe bits into the 'sample' variable. */
memcpy(&sample,
logic->inbuf + logic->itercnt * logic->di->data_unitsize,
logic->di->data_unitsize);
- for (i = 0; i < logic->di->dec_num_probes; i++)
+
+ /* All probe values (required + optional) are pre-set to 42. */
+ memset(probe_samples, 42, logic->di->dec_num_probes);
+ /* TODO: None or -1 in Python would be better. */
+
+ /*
+ * Set probe values of specified/used probes to their resp. values.
+ * Unused probe values (those not specified by the user) remain at 42.
+ */
+ for (i = 0; i < logic->di->dec_num_probes; i++) {
+ /* A probemap value of -1 means "unused optional probe". */
+ if (logic->di->dec_probemap[i] == -1)
+ continue;
probe_samples[i] = sample & (1 << logic->di->dec_probemap[i]) ? 1 : 0;
+ }
/* Prepare the next samplenum/sample list in this iteration. */
py_samplenum =