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author | Bert Vermeulen <bert@biot.com> | 2013-10-30 22:25:45 +0100 |
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committer | Bert Vermeulen <bert@biot.com> | 2013-10-30 22:41:22 +0100 |
commit | f372d597739a30e0106aebc8225c1edebf6d93e3 (patch) | |
tree | f4fccac01ff2de612c1ee6163cfe19491c1cd2be /decoders | |
parent | ed41649709abc02362df526cbd725775000e8199 (diff) | |
download | libsigrokdecode-f372d597739a30e0106aebc8225c1edebf6d93e3.tar.gz libsigrokdecode-f372d597739a30e0106aebc8225c1edebf6d93e3.zip |
Receive samplerate via metadata(), not start()
Diffstat (limited to 'decoders')
-rw-r--r-- | decoders/can/pd.py | 13 | ||||
-rw-r--r-- | decoders/dcf77/pd.py | 10 | ||||
-rw-r--r-- | decoders/i2s/pd.py | 10 | ||||
-rw-r--r-- | decoders/onewire_link/pd.py | 10 | ||||
-rw-r--r-- | decoders/uart/pd.py | 14 | ||||
-rw-r--r-- | decoders/usb_signalling/pd.py | 15 |
6 files changed, 53 insertions, 19 deletions
diff --git a/decoders/can/pd.py b/decoders/can/pd.py index 61b0a74..91ccf42 100644 --- a/decoders/can/pd.py +++ b/decoders/can/pd.py @@ -60,15 +60,18 @@ class Decoder(srd.Decoder): ] def __init__(self, **kwargs): + self.samplerate = None self.reset_variables() - def start(self, metadata): + def start(self): # self.out_proto = self.add(srd.OUTPUT_PROTO, 'can') self.out_ann = self.add(srd.OUTPUT_ANN, 'can') - self.samplerate = metadata['samplerate'] - self.bit_width = float(self.samplerate) / float(self.options['bitrate']) - self.bitpos = (self.bit_width / 100.0) * self.options['sample_point'] + def metadata(self, key, value): + if key == srd.SRD_CONF_SAMPLERATE: + self.samplerate = value + self.bit_width = float(self.samplerate) / float(self.options['bitrate']) + self.bitpos = (self.bit_width / 100.0) * self.options['sample_point'] def report(self): pass @@ -362,6 +365,8 @@ class Decoder(srd.Decoder): self.curbit += 1 def decode(self, ss, es, data): + if self.samplerate is None: + raise Exception("Cannot decode without samplerate.") for (self.samplenum, pins) in data: (can_rx,) = pins diff --git a/decoders/dcf77/pd.py b/decoders/dcf77/pd.py index a31c313..57cd448 100644 --- a/decoders/dcf77/pd.py +++ b/decoders/dcf77/pd.py @@ -65,6 +65,7 @@ class Decoder(srd.Decoder): ] def __init__(self, **kwargs): + self.samplerate = None self.state = 'WAIT FOR RISING EDGE' self.oldpins = None self.oldval = None @@ -74,11 +75,14 @@ class Decoder(srd.Decoder): self.bitcount = 0 # Counter for the DCF77 bits (0..58) self.dcf77_bitnumber_is_known = 0 - def start(self, metadata): - self.samplerate = metadata['samplerate'] + def start(self): # self.out_proto = self.add(srd.OUTPUT_PROTO, 'dcf77') self.out_ann = self.add(srd.OUTPUT_ANN, 'dcf77') + def metadata(self, key, value): + if key == srd.SRD_CONF_SAMPLERATE: + self.samplerate = value + def report(self): pass @@ -244,6 +248,8 @@ class Decoder(srd.Decoder): raise Exception('Invalid DCF77 bit: %d' % c) def decode(self, ss, es, data): + if self.samplerate is None: + raise Exception("Cannot decode without samplerate.") for (self.samplenum, pins) in data: # Ignore identical samples early on (for performance reasons). diff --git a/decoders/i2s/pd.py b/decoders/i2s/pd.py index 9fbcef7..91d261a 100644 --- a/decoders/i2s/pd.py +++ b/decoders/i2s/pd.py @@ -58,6 +58,7 @@ class Decoder(srd.Decoder): ] def __init__(self, **kwargs): + self.samplerate = None self.oldsck = 1 self.oldws = 1 self.bitcount = 0 @@ -67,11 +68,14 @@ class Decoder(srd.Decoder): self.start_sample = None self.wordlength = -1 - def start(self, metadata): - self.samplerate = metadata['samplerate'] + def start(self): self.out_proto = self.add(srd.OUTPUT_PROTO, 'i2s') self.out_ann = self.add(srd.OUTPUT_ANN, 'i2s') + def metadata(self, key, value): + if key == srd.SRD_CONF_SAMPLERATE: + self.samplerate = value + def putpb(self, data): self.put(self.start_sample, self.samplenum, self.out_proto, data) @@ -93,6 +97,8 @@ class Decoder(srd.Decoder): (self.samplesreceived, self.wordlength, samplerate) def decode(self, ss, es, data): + if self.samplerate is None: + raise Exception("Cannot decode without samplerate.") for self.samplenum, (sck, ws, sd) in data: # Ignore sample if the bit clock hasn't changed. diff --git a/decoders/onewire_link/pd.py b/decoders/onewire_link/pd.py index a309cc3..4a826d1 100644 --- a/decoders/onewire_link/pd.py +++ b/decoders/onewire_link/pd.py @@ -80,6 +80,7 @@ class Decoder(srd.Decoder): self.put(self.rise, self.samplenum, self.out_ann, data) def __init__(self, **kwargs): + self.samplerate = None self.samplenum = 0 self.state = 'WAIT FOR FALLING EDGE' self.present = 0 @@ -90,11 +91,14 @@ class Decoder(srd.Decoder): self.fall = 0 self.rise = 0 - def start(self, metadata): + def start(self): self.out_proto = self.add(srd.OUTPUT_PROTO, 'onewire_link') self.out_ann = self.add(srd.OUTPUT_ANN, 'onewire_link') - self.samplerate = metadata['samplerate'] + def metadata(self, key, value): + if key != srd.SRD_CONF_SAMPLERATE: + return + self.samplerate = value # Check if samplerate is appropriate. if self.options['overdrive'] == 'yes': @@ -173,6 +177,8 @@ class Decoder(srd.Decoder): pass def decode(self, ss, es, data): + if self.samplerate is None: + raise Exception("Cannot decode without samplerate.") for (self.samplenum, (owr, pwr)) in data: # State machine. if self.state == 'WAIT FOR FALLING EDGE': diff --git a/decoders/uart/pd.py b/decoders/uart/pd.py index 6ecc8cf..ab96886 100644 --- a/decoders/uart/pd.py +++ b/decoders/uart/pd.py @@ -118,6 +118,7 @@ class Decoder(srd.Decoder): self.put(s - halfbit, s + halfbit, self.out_proto, data) def __init__(self, **kwargs): + self.samplerate = None self.samplenum = 0 self.frame_start = [-1, -1] self.startbit = [-1, -1] @@ -130,14 +131,15 @@ class Decoder(srd.Decoder): self.oldbit = [1, 1] self.oldpins = [1, 1] - def start(self, metadata): - self.samplerate = metadata['samplerate'] + def start(self): self.out_proto = self.add(srd.OUTPUT_PROTO, 'uart') self.out_ann = self.add(srd.OUTPUT_ANN, 'uart') - # The width of one UART bit in number of samples. - self.bit_width = \ - float(self.samplerate) / float(self.options['baudrate']) + def metadata(self, key, value): + if key == srd.SRD_CONF_SAMPLERATE: + self.samplerate = value; + # The width of one UART bit in number of samples. + self.bit_width = float(self.samplerate) / float(self.options['baudrate']) def report(self): pass @@ -280,6 +282,8 @@ class Decoder(srd.Decoder): self.putg([4, ['Stop bit', 'Stop', 'T']]) def decode(self, ss, es, data): + if self.samplerate is None: + raise Exception("Cannot decode without samplerate.") # TODO: Either RX or TX could be omitted (optional probe). for (self.samplenum, pins) in data: diff --git a/decoders/usb_signalling/pd.py b/decoders/usb_signalling/pd.py index d2a1e8a..8a323e0 100644 --- a/decoders/usb_signalling/pd.py +++ b/decoders/usb_signalling/pd.py @@ -94,6 +94,7 @@ class Decoder(srd.Decoder): ] def __init__(self): + self.samplerate = None self.oldsym = 'J' # The "idle" state is J. self.ss_sop = None self.ss_block = None @@ -107,12 +108,16 @@ class Decoder(srd.Decoder): self.consecutive_ones = 0 self.state = 'IDLE' - def start(self, metadata): + def start(self): self.out_proto = self.add(srd.OUTPUT_PROTO, 'usb_signalling') self.out_ann = self.add(srd.OUTPUT_ANN, 'usb_signalling') - self.bitrate = bitrates[self.options['signalling']] - self.bitwidth = float(metadata['samplerate']) / float(self.bitrate) - self.halfbit = int(self.bitwidth / 2) + + def metadata(self, key, value): + if key == srd.SRD_CONF_SAMPLERATE: + self.samplerate = value + self.bitrate = bitrates[self.options['signalling']] + self.bitwidth = float(self.samplerate) / float(self.bitrate) + self.halfbit = int(self.bitwidth / 2) def report(self): pass @@ -201,6 +206,8 @@ class Decoder(srd.Decoder): self.oldsym = sym def decode(self, ss, es, data): + if self.samplerate is None: + raise Exception("Cannot decode without samplerate.") for (self.samplenum, pins) in data: # State machine. if self.state == 'IDLE': |