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author | George Hopkins <george-hopkins@null.net> | 2017-11-30 15:56:45 +0100 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2018-05-03 16:08:07 +0200 |
commit | bf1eeb932f319b3984580e5d47ecb65ff9a62020 (patch) | |
tree | acb3b9e8e90e7aa97e3e1e6243c1374cfc03e1f7 /decoders | |
parent | 9f111fa9d50770c6e8f417012e4237b76891153d (diff) | |
download | libsigrokdecode-bf1eeb932f319b3984580e5d47ecb65ff9a62020.tar.gz libsigrokdecode-bf1eeb932f319b3984580e5d47ecb65ff9a62020.zip |
jtag_stm32: Fix handling of boundary scan TAP
Diffstat (limited to 'decoders')
-rw-r--r-- | decoders/jtag_stm32/pd.py | 54 |
1 files changed, 28 insertions, 26 deletions
diff --git a/decoders/jtag_stm32/pd.py b/decoders/jtag_stm32/pd.py index d27a557..4cd58bb 100644 --- a/decoders/jtag_stm32/pd.py +++ b/decoders/jtag_stm32/pd.py @@ -31,6 +31,11 @@ ir = { '1000': ['ABORT', 35], # Abort register # TODO: 32 bits? Datasheet typo? } +# Boundary scan data registers (in IR[8:4]) and their sizes (in bits) +bs_ir = { + '11111': ['BYPASS', 1], # Bypass register +} + # ARM Cortex-M3 r1p1-01rel0 ID code cm3_idcode = 0x3ba00477 @@ -175,37 +180,35 @@ class Decoder(srd.Decoder): self.putx([0, ['BYPASS: ' + bits]]) def handle_reg_idcode(self, cmd, bits): - # IDCODE is a read-only register which is always accessible. - # IR == IDCODE: The 32bit device ID code is shifted out via DR next. - - id_hex, manuf, ver, part = decode_device_id_code(bits[:-1]) - cc = '0x%x' % int('0b' + bits[:-1][-12:-8], 2) - ic = '0x%x' % int('0b' + bits[:-1][-7:-1], 2) - - self.putf(0, 0, [1, ['Reserved (BS TAP)', 'BS', 'B']]) - self.putf(1, 1, [1, ['Reserved', 'Res', 'R']]) - self.putf(9, 12, [0, ['Continuation code: %s' % cc, 'CC', 'C']]) - self.putf(2, 8, [0, ['Identity code: %s' % ic, 'IC', 'I']]) - self.putf(2, 12, [1, ['Manufacturer: %s' % manuf, 'Manuf', 'M']]) - self.putf(13, 28, [1, ['Part: %s' % part, 'Part', 'P']]) - self.putf(29, 32, [1, ['Version: %s' % ver, 'Version', 'V']]) - - self.ss = self.samplenums[1][0] + bits = bits[1:] + + id_hex, manuf, ver, part = decode_device_id_code(bits) + cc = '0x%x' % int('0b' + bits[-12:-8], 2) + ic = '0x%x' % int('0b' + bits[-7:-1], 2) + + self.putf(0, 0, [1, ['Reserved', 'Res', 'R']]) + self.putf(8, 11, [0, ['Continuation code: %s' % cc, 'CC', 'C']]) + self.putf(1, 7, [0, ['Identity code: %s' % ic, 'IC', 'I']]) + self.putf(1, 11, [1, ['Manufacturer: %s' % manuf, 'Manuf', 'M']]) + self.putf(12, 27, [1, ['Part: %s' % part, 'Part', 'P']]) + self.putf(28, 31, [1, ['Version: %s' % ver, 'Version', 'V']]) + self.putf(32, 32, [1, ['BYPASS (BS TAP)', 'BS', 'B']]) + self.putx([2, ['IDCODE: %s (%s: %s/%s)' % \ - decode_device_id_code(bits[:-1])]]) + decode_device_id_code(bits)]]) def handle_reg_dpacc(self, cmd, bits): - bits = bits[:-1] + bits = bits[1:] s = data_in('DPACC', bits) if (cmd == 'DR TDI') else data_out(bits) self.putx([2, [s]]) def handle_reg_apacc(self, cmd, bits): - bits = bits[:-1] + bits = bits[1:] s = data_in('APACC', bits) if (cmd == 'DR TDI') else data_out(bits) self.putx([2, [s]]) def handle_reg_abort(self, cmd, bits): - bits = bits[:-1] + bits = bits[1:] # Bits[31:1]: reserved. Bit[0]: DAPABORT. a = '' if (bits[0] == '1') else 'No ' s = 'DAPABORT = %s: %sDAP abort generated' % (bits[0], a) @@ -216,7 +219,7 @@ class Decoder(srd.Decoder): self.putx([3, ['WARNING: DAPABORT[31:1] reserved!']]) def handle_reg_unknown(self, cmd, bits): - bits = bits[:-1] + bits = bits[1:] self.putx([2, ['Unknown instruction: %s' % bits]]) def decode(self, ss, es, data): @@ -238,11 +241,10 @@ class Decoder(srd.Decoder): # The STM32F10xxx has two serially connected JTAG TAPs, the # boundary scan tap (5 bits) and the Cortex-M3 TAP (4 bits). # See UM 31.5 "STM32F10xxx JTAG TAP connection" for details. - self.state = ir.get(val[:-1][-4:], ['UNKNOWN', 0])[0] - bstap_ir = ir.get(val[:-1][:4], ['UNKNOWN', 0])[0] - self.putf(5, 8, [1, ['IR (BS TAP): ' + bstap_ir]]) - self.putf(1, 4, [1, ['IR (M3 TAP): ' + self.state]]) - self.putf(0, 0, [1, ['Reserved (BS TAP)', 'BS', 'B']]) + self.state = ir.get(val[5:9], ['UNKNOWN', 0])[0] + bstap_ir = bs_ir.get(val[:5], ['UNKNOWN', 0])[0] + self.putf(4, 8, [1, ['IR (BS TAP): ' + bstap_ir]]) + self.putf(0, 3, [1, ['IR (M3 TAP): ' + self.state]]) self.putx([2, ['IR: %s' % self.state]]) elif self.state == 'BYPASS': # Here we're interested in incoming bits (TDI). |