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author | Gerhard Sittig <gerhard.sittig@gmx.net> | 2020-07-27 17:48:40 +0200 |
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committer | Gerhard Sittig <gerhard.sittig@gmx.net> | 2020-08-30 07:23:58 +0200 |
commit | b46b88f37ac302c7e00c288e78dab05a2ac74328 (patch) | |
tree | 18b5ef371fb18d167f02cae113dae2bd90562c5a /decoders | |
parent | ead003186fc788e9f330264c85668e2690896bce (diff) | |
download | libsigrokdecode-b46b88f37ac302c7e00c288e78dab05a2ac74328.tar.gz libsigrokdecode-b46b88f37ac302c7e00c288e78dab05a2ac74328.zip |
sle44xx: extend decoder doc string, add "memory cards" hint
Add a stronger hint to "memory cards", users might expect to see this
detail in the decoder's description. Rephrase how the reset line will
terminate pending memory reads.
Diffstat (limited to 'decoders')
-rw-r--r-- | decoders/sle44xx/__init__.py | 5 | ||||
-rw-r--r-- | decoders/sle44xx/pd.py | 2 |
2 files changed, 4 insertions, 3 deletions
diff --git a/decoders/sle44xx/__init__.py b/decoders/sle44xx/__init__.py index 1bc7189..0eb0285 100644 --- a/decoders/sle44xx/__init__.py +++ b/decoders/sle44xx/__init__.py @@ -18,8 +18,9 @@ ## ''' -SLE 4418/28/32/42 implement a 2-wire protocol (CLK and I/O) for comunication -along the RST signal which is used to abort unnecessarily long memory reads. +SLE 4418/28/32/42 memory cards implement a 2-wire protocol (CLK and I/O) +for data communication, along with the RST signal which resets the card's +internal state, and can terminate currently executing long memory reads. ''' from .pd import Decoder diff --git a/decoders/sle44xx/pd.py b/decoders/sle44xx/pd.py index e897b13..a1cd8f8 100644 --- a/decoders/sle44xx/pd.py +++ b/decoders/sle44xx/pd.py @@ -47,7 +47,7 @@ class Decoder(srd.Decoder): api_version = 3 id = 'sle44xx' name = 'SLE 44xx' - longname = 'SLE44xx protocol' + longname = 'SLE44xx memory card' desc = 'SLE 4418/28/32/42 memory card serial protocol' license = 'gplv2+' inputs = ['logic'] |