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| author | Joel Holdsworth <joel@airwebreathe.org.uk> | 2013-12-28 01:21:26 +0100 |
|---|---|---|
| committer | Joel Holdsworth <joel@airwebreathe.org.uk> | 2013-12-28 09:04:17 +0100 |
| commit | ab4aa33c4bd3f72707c718bb0448722a5c2c9912 (patch) | |
| tree | deecee3d563e637b3a3b06a01341ca4da576cb9f /decoders | |
| parent | 919ace16e7100fccd51fda16c6d40fc3ad9915e2 (diff) | |
| download | libsigrokdecode-ab4aa33c4bd3f72707c718bb0448722a5c2c9912.tar.gz libsigrokdecode-ab4aa33c4bd3f72707c718bb0448722a5c2c9912.zip | |
i2c: Replaced I2C with I²C
Diffstat (limited to 'decoders')
| -rw-r--r-- | decoders/i2c/__init__.py | 4 | ||||
| -rw-r--r-- | decoders/i2c/pd.py | 6 |
2 files changed, 5 insertions, 5 deletions
diff --git a/decoders/i2c/__init__.py b/decoders/i2c/__init__.py index 57309e3..95d9e18 100644 --- a/decoders/i2c/__init__.py +++ b/decoders/i2c/__init__.py @@ -19,9 +19,9 @@ ## ''' -I2C protocol decoder. +I²C protocol decoder. -The Inter-Integrated Circuit (I2C) bus is a bidirectional, multi-master +The Inter-Integrated Circuit (I²C) bus is a bidirectional, multi-master bus using two signals (SCL = serial clock line, SDA = serial data line). ''' diff --git a/decoders/i2c/pd.py b/decoders/i2c/pd.py index 6c505e0..5eff169 100644 --- a/decoders/i2c/pd.py +++ b/decoders/i2c/pd.py @@ -18,7 +18,7 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -# I2C protocol decoder +# I²C protocol decoder # TODO: Look into arbitration, collision detection, clock synchronisation, etc. # TODO: Implement support for 10bit slave addresses. @@ -30,7 +30,7 @@ import sigrokdecode as srd ''' Protocol output format: -I2C packet: +I²C packet: [<cmd>, <data>] <cmd> is one of: @@ -66,7 +66,7 @@ proto = { class Decoder(srd.Decoder): api_version = 1 id = 'i2c' - name = 'I2C' + name = 'I²C' longname = 'Inter-Integrated Circuit' desc = 'Two-wire, multi-master, serial bus.' license = 'gplv2+' |