summaryrefslogtreecommitdiff
path: root/decoders
diff options
context:
space:
mode:
authorUwe Hermann <uwe@hermann-uwe.de>2013-10-09 18:59:30 +0200
committerUwe Hermann <uwe@hermann-uwe.de>2013-10-13 13:48:56 +0200
commit5f4de613af7b95dd37c6df69efb1214c741fdd05 (patch)
tree2bb8af65ffca4bdd0fe589c0f66c44d9dc262baf /decoders
parent63374ad88faa566e3fffbca0e31c501e68ec372b (diff)
downloadlibsigrokdecode-5f4de613af7b95dd37c6df69efb1214c741fdd05.tar.gz
libsigrokdecode-5f4de613af7b95dd37c6df69efb1214c741fdd05.zip
tlc5620: Use annotation types.
This fixes parts of bug #168.
Diffstat (limited to 'decoders')
-rw-r--r--decoders/tlc5620/__init__.py5
-rw-r--r--decoders/tlc5620/pd.py15
2 files changed, 9 insertions, 11 deletions
diff --git a/decoders/tlc5620/__init__.py b/decoders/tlc5620/__init__.py
index bd68377..6cf3401 100644
--- a/decoders/tlc5620/__init__.py
+++ b/decoders/tlc5620/__init__.py
@@ -20,11 +20,6 @@
'''
Texas Instruments TLC5620 protocol decoder.
-
-TODO: Description.
-
-Details:
-TODO
'''
from .pd import *
diff --git a/decoders/tlc5620/pd.py b/decoders/tlc5620/pd.py
index 10f8572..9ce9e94 100644
--- a/decoders/tlc5620/pd.py
+++ b/decoders/tlc5620/pd.py
@@ -48,8 +48,11 @@ class Decoder(srd.Decoder):
]
options = {}
annotations = [
- ['Text', 'Human-readable text'],
- ['Warnings', 'Human-readable warnings'],
+ ['dac_select', 'DAC select'],
+ ['gain', 'Gain'],
+ ['value', 'DAC value'],
+ ['data_latch', 'Data latch point'],
+ ['ldac_fall', 'LDAC falling edge'],
]
def __init__(self, **kwargs):
@@ -76,21 +79,21 @@ class Decoder(srd.Decoder):
self.gain = 1 + self.bits[2]
self.put(self.ss_gain, self.es_gain, self.out_ann,
- [0, ['Gain: x%d' % self.gain]])
+ [1, ['Gain: x%d' % self.gain]])
s = "".join(str(i) for i in self.bits[3:])
self.dac_value = int(s, 2)
self.put(self.ss_value, self.es_value, self.out_ann,
- [0, ['DAC value: %d' % self.dac_value]])
+ [2, ['DAC value: %d' % self.dac_value]])
def handle_falling_edge_load(self):
self.put(self.samplenum, self.samplenum, self.out_ann,
- [0, ['Setting %s value to %d (x%d gain)' % \
+ [3, ['Setting %s value to %d (x%d gain)' % \
(self.dac_select, self.dac_value, self.gain)]])
def handle_falling_edge_ldac(self):
self.put(self.samplenum, self.samplenum, self.out_ann,
- [0, ['Falling edge on LDAC pin']])
+ [4, ['Falling edge on LDAC pin']])
def handle_new_dac_bit(self):
self.bits.append(self.datapin)