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authorGerhard Sittig <gerhard.sittig@gmx.net>2017-06-18 19:27:47 +0200
committerUwe Hermann <uwe@hermann-uwe.de>2017-06-21 17:45:15 +0200
commit1b9ef18be867133e721681cbc20272cf5c669504 (patch)
treec4854dc5d70fd4a4a1b603b9639694bbf5c8ae69 /decoders
parent6e19f3257d896cfa8c1afffbdbf58a88fa3b9327 (diff)
downloadlibsigrokdecode-1b9ef18be867133e721681cbc20272cf5c669504.tar.gz
libsigrokdecode-1b9ef18be867133e721681cbc20272cf5c669504.zip
decoders: Rephrase condition-less .wait() calls (self documentation)
Telling .wait() to "skip one sample" slightly obfuscates the intent of getting the next samples while no condition applies. Explicitly pass no condition arguments instead, to better reflect the purpose. Coincidently these .wait() calls will execute in slightly less expensive code paths in the common code.
Diffstat (limited to 'decoders')
-rw-r--r--decoders/dali/pd.py2
-rw-r--r--decoders/dmx512/pd.py2
-rw-r--r--decoders/dsi/pd.py2
-rw-r--r--decoders/em4100/pd.py2
-rw-r--r--decoders/ir_rc5/pd.py2
-rw-r--r--decoders/lpc/pd.py2
-rw-r--r--decoders/qi/pd.py2
-rw-r--r--decoders/rgb_led_ws281x/pd.py2
-rw-r--r--decoders/usb_signalling/pd.py4
-rw-r--r--decoders/wiegand/pd.py2
-rw-r--r--decoders/z80/pd.py2
11 files changed, 12 insertions, 12 deletions
diff --git a/decoders/dali/pd.py b/decoders/dali/pd.py
index bdb3fe6..904adc7 100644
--- a/decoders/dali/pd.py
+++ b/decoders/dali/pd.py
@@ -202,7 +202,7 @@ class Decoder(srd.Decoder):
bit = 0
while True:
# TODO: Come up with more appropriate self.wait() conditions.
- (dali,) = self.wait({'skip': 1})
+ (dali,) = self.wait()
if self.options['polarity'] == 'active-high':
dali ^= 1 # Invert.
diff --git a/decoders/dmx512/pd.py b/decoders/dmx512/pd.py
index 4da7076..f250a3b 100644
--- a/decoders/dmx512/pd.py
+++ b/decoders/dmx512/pd.py
@@ -101,7 +101,7 @@ class Decoder(srd.Decoder):
# Mark and read a single transmitted byte
# (start bit, 8 data bits, 2 stop bits).
elif self.state == 'READ BYTE':
- (dmx,) = self.wait({'skip': 1})
+ (dmx,) = self.wait()
self.next_sample = self.run_start + (self.bit + 1) * self.skip_per_bit
self.aggreg += dmx
if self.samplenum != self.next_sample:
diff --git a/decoders/dsi/pd.py b/decoders/dsi/pd.py
index 35a1225..5b473be 100644
--- a/decoders/dsi/pd.py
+++ b/decoders/dsi/pd.py
@@ -108,7 +108,7 @@ class Decoder(srd.Decoder):
raise SamplerateError('Cannot decode without samplerate.')
bit = 0
while True:
- (self.dsi,) = self.wait({'skip': 1})
+ (self.dsi,) = self.wait()
if self.options['polarity'] == 'active-high':
self.dsi ^= 1 # Invert.
diff --git a/decoders/em4100/pd.py b/decoders/em4100/pd.py
index 8c8a72b..711c0fa 100644
--- a/decoders/em4100/pd.py
+++ b/decoders/em4100/pd.py
@@ -212,7 +212,7 @@ class Decoder(srd.Decoder):
raise SamplerateError('Cannot decode without samplerate.')
# Initialize internal state from the very first sample.
- (pin,) = self.wait({'skip': 1})
+ (pin,) = self.wait()
self.oldpin = pin
self.last_samplenum = self.samplenum
self.lastlast_samplenum = self.samplenum
diff --git a/decoders/ir_rc5/pd.py b/decoders/ir_rc5/pd.py
index 0b39e70..ae29f10 100644
--- a/decoders/ir_rc5/pd.py
+++ b/decoders/ir_rc5/pd.py
@@ -139,7 +139,7 @@ class Decoder(srd.Decoder):
raise SamplerateError('Cannot decode without samplerate.')
while True:
- (self.ir,) = self.wait({'skip': 1})
+ (self.ir,) = self.wait()
# Wait for any edge (rising or falling).
if self.old_ir == self.ir:
diff --git a/decoders/lpc/pd.py b/decoders/lpc/pd.py
index 5e838cf..cdd1db8 100644
--- a/decoders/lpc/pd.py
+++ b/decoders/lpc/pd.py
@@ -315,7 +315,7 @@ class Decoder(srd.Decoder):
def decode(self):
while True:
# TODO: Come up with more appropriate self.wait() conditions.
- pins = self.wait({'skip': 1})
+ pins = self.wait()
# If none of the pins changed, there's nothing to do.
if self.oldpins == pins:
diff --git a/decoders/qi/pd.py b/decoders/qi/pd.py
index 0c880dd..779cafa 100644
--- a/decoders/qi/pd.py
+++ b/decoders/qi/pd.py
@@ -232,7 +232,7 @@ class Decoder(srd.Decoder):
if not self.samplerate:
raise SamplerateError('Cannot decode without samplerate.')
- (qi,) = self.wait({'skip': 1})
+ (qi,) = self.wait()
self.handle_transition(self.samplenum, qi == 0)
while True:
prev = self.samplenum
diff --git a/decoders/rgb_led_ws281x/pd.py b/decoders/rgb_led_ws281x/pd.py
index ca35283..5cf2124 100644
--- a/decoders/rgb_led_ws281x/pd.py
+++ b/decoders/rgb_led_ws281x/pd.py
@@ -76,7 +76,7 @@ class Decoder(srd.Decoder):
while True:
# TODO: Come up with more appropriate self.wait() conditions.
- (pin,) = self.wait({'skip': 1})
+ (pin,) = self.wait()
if self.oldpin is None:
self.oldpin = pin
diff --git a/decoders/usb_signalling/pd.py b/decoders/usb_signalling/pd.py
index ae0f651..7a885c0 100644
--- a/decoders/usb_signalling/pd.py
+++ b/decoders/usb_signalling/pd.py
@@ -302,7 +302,7 @@ class Decoder(srd.Decoder):
raise SamplerateError('Cannot decode without samplerate.')
# Seed internal state from the very first sample.
- pins = self.wait({'skip': 1})
+ pins = self.wait()
sym = symbols[self.options['signalling']][pins]
self.handle_idle(sym)
@@ -330,7 +330,7 @@ class Decoder(srd.Decoder):
self.get_eop(sym)
elif self.state == 'WAIT IDLE':
# Skip "all-low" input. Wait for high level on either DP or DM.
- pins = self.wait({'skip': 1})
+ pins = self.wait()
while not pins[0] and not pins[1]:
pins = self.wait([{0: 'h'}, {1: 'h'}])
if self.samplenum - self.samplenum_lastedge > 1:
diff --git a/decoders/wiegand/pd.py b/decoders/wiegand/pd.py
index 42e63b9..3edefc5 100644
--- a/decoders/wiegand/pd.py
+++ b/decoders/wiegand/pd.py
@@ -105,7 +105,7 @@ class Decoder(srd.Decoder):
def decode(self):
while True:
# TODO: Come up with more appropriate self.wait() conditions.
- (d0, d1) = self.wait({'skip': 1})
+ (d0, d1) = self.wait()
if d0 == self._d0_prev and d1 == self._d1_prev:
if self.es_bit and self.samplenum >= self.es_bit:
diff --git a/decoders/z80/pd.py b/decoders/z80/pd.py
index bd2ec57..76e1858 100644
--- a/decoders/z80/pd.py
+++ b/decoders/z80/pd.py
@@ -132,7 +132,7 @@ class Decoder(srd.Decoder):
def decode(self):
while True:
# TODO: Come up with more appropriate self.wait() conditions.
- pins = self.wait({'skip': 1})
+ pins = self.wait()
cycle = Cycle.NONE
if pins[Pin.MREQ] != 1: # default to asserted
if pins[Pin.RD] == 0: