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| author | Daniel Elstner <daniel.kitta@gmail.com> | 2014-02-27 22:07:58 +0100 |
|---|---|---|
| committer | Daniel Elstner <daniel.kitta@gmail.com> | 2014-02-27 22:07:58 +0100 |
| commit | 8830db5df55241e1ea775a70671ecb11235cf3c1 (patch) | |
| tree | 75bd3e2bb74edaf0ffb498500b0db120ef8df610 /decoders/z80/pd.py | |
| parent | aef3c1095e966212fd9a9b02cb08a0ff50e13a7b (diff) | |
| download | libsigrokdecode-8830db5df55241e1ea775a70671ecb11235cf3c1.tar.gz libsigrokdecode-8830db5df55241e1ea775a70671ecb11235cf3c1.zip | |
z80: Output jump offsets relative to instruction start.
Most assemblers recognize the symbol $ for the address of the
current instruction. Make use of this to output relative jump
instructions using the $[+-]offset syntax, with offset being
the displacement minus the instruction length.
Diffstat (limited to 'decoders/z80/pd.py')
| -rw-r--r-- | decoders/z80/pd.py | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/decoders/z80/pd.py b/decoders/z80/pd.py index 088408a..c88ea05 100644 --- a/decoders/z80/pd.py +++ b/decoders/z80/pd.py @@ -139,6 +139,7 @@ class Decoder(srd.Decoder): self.ann_dasm = None self.prev_cycle = Cycle.NONE self.op_state = OpState.IDLE + self.instr_len = 0 def decode(self, ss, es, data): for (self.samplenum, pins) in data: @@ -175,6 +176,7 @@ class Decoder(srd.Decoder): self.pend_addr = bus_addr def on_cycle_end(self): + self.instr_len += 1 self.op_state = getattr(self, 'on_state_' + self.op_state)() if self.ann_dasm is not None: self.put_disasm() @@ -196,8 +198,8 @@ class Decoder(srd.Decoder): self.ann_dasm = None def put_disasm(self): - text = formatter.format(self.mnemonic, r=self.arg_reg, - d=self.arg_dis, i=self.arg_imm, + text = formatter.format(self.mnemonic, r=self.arg_reg, d=self.arg_dis, + j=self.arg_dis+self.instr_len, i=self.arg_imm, ro=self.arg_read, wo=self.arg_write) self.put_text(self.dasm_start, self.ann_dasm, text) self.ann_dasm = None @@ -226,6 +228,7 @@ class Decoder(srd.Decoder): self.write_pend = False self.dasm_start = self.samplenum self.op_prefix = 0 + self.instr_len = 0 if self.bus_data in (0xCB, 0xED, 0xDD, 0xFD): return OpState.PRE1 else: |