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authorStefan Brüns <stefan.bruens@rwth-aachen.de>2015-11-30 00:35:11 +0100
committerStefan Brüns <stefan.bruens@rwth-aachen.de>2015-11-30 00:35:11 +0100
commit831d893d4b9e4f76b5e645ee5e6fcfd4962ffa6a (patch)
tree40f00a00a4246a444f3acdd356053de619537dc3 /decoders/usb_signalling
parente655c0aa44ac56ff66ad98d30a97cf852bdf7048 (diff)
downloadlibsigrokdecode-831d893d4b9e4f76b5e645ee5e6fcfd4962ffa6a.tar.gz
libsigrokdecode-831d893d4b9e4f76b5e645ee5e6fcfd4962ffa6a.zip
usb_signalling: fix SOP detection after an error condition
If the oldsym is not set to 'J' before entering IDLE state, the SOP detection will never trigger
Diffstat (limited to 'decoders/usb_signalling')
-rw-r--r--decoders/usb_signalling/pd.py4
1 files changed, 3 insertions, 1 deletions
diff --git a/decoders/usb_signalling/pd.py b/decoders/usb_signalling/pd.py
index 6233c3e..4dfde83 100644
--- a/decoders/usb_signalling/pd.py
+++ b/decoders/usb_signalling/pd.py
@@ -272,6 +272,7 @@ class Decoder(srd.Decoder):
elif sym == 'LS_J':
self.signalling = 'low-speed'
self.update_bitrate()
+ self.oldsym = 'J'
self.state = 'IDLE'
def decode(self, ss, es, data):
@@ -302,8 +303,9 @@ class Decoder(srd.Decoder):
self.get_bit(sym)
elif self.state == 'GET EOP':
self.get_eop(sym)
+ self.oldpins = pins
elif self.state == 'WAIT IDLE':
- if self.oldpins == pins:
+ if tuple(pins) == (0, 0):
continue
if self.samplenum - self.samplenum_lastedge > 1:
sym = symbols[self.options['signalling']][tuple(pins)]