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authorUwe Hermann <uwe@hermann-uwe.de>2012-01-25 22:11:38 +0100
committerUwe Hermann <uwe@hermann-uwe.de>2012-01-25 23:49:32 +0100
commitdecde15ecb51b3326b31019af61e0a729b9c61d0 (patch)
tree362aefd1a9759731bdf8ee2cc3d533c83a7faa9a /decoders/uart
parent385508e9b12d87519f9144a67e7682b46a592200 (diff)
downloadlibsigrokdecode-decde15ecb51b3326b31019af61e0a729b9c61d0.tar.gz
libsigrokdecode-decde15ecb51b3326b31019af61e0a729b9c61d0.zip
srd: All PDs: Various fixes, cosmetics.
- List all API methods and metadata variables in all PDs to make things easier and more consistent for new PD writers. - Fix probe assignment in a few PDs. - Raise exceptions upon invalid states of the PD state machines (bug).
Diffstat (limited to 'decoders/uart')
-rw-r--r--decoders/uart/uart.py6
1 files changed, 4 insertions, 2 deletions
diff --git a/decoders/uart/uart.py b/decoders/uart/uart.py
index f827a22..a0f915c 100644
--- a/decoders/uart/uart.py
+++ b/decoders/uart/uart.py
@@ -199,6 +199,7 @@ class Decoder(srd.Decoder):
{'id': 'rx', 'name': 'RX', 'desc': 'UART receive line'},
{'id': 'tx', 'name': 'TX', 'desc': 'UART transmit line'},
]
+ extra_probes = []
options = {
'baudrate': ['Baud rate', 115200],
'num_data_bits': ['Data bits', 8], # Valid: 5-9.
@@ -391,7 +392,8 @@ class Decoder(srd.Decoder):
self.put(self.samplenum, self.samplenum, self.out_ann,
[ANN_ASCII, ['Stop bit', 'Stop', 'P']])
- def decode(self, ss, es, data): # TODO
+ def decode(self, ss, es, data):
+ # TODO: Either RX or TX could be omitted (optional probe).
for (samplenum, (rx, tx)) in data:
# TODO: Start counting at 0 or 1? Increase before or after?
@@ -420,7 +422,7 @@ class Decoder(srd.Decoder):
elif self.state[rxtx] == GET_STOP_BITS:
self.get_stop_bits(rxtx, signal)
else:
- raise Exception('Invalid state: %s' % self.state[rxtx])
+ raise Exception('Invalid state: %d' % self.state[rxtx])
# Save current RX/TX values for the next round.
self.oldbit[rxtx] = signal