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authorBert Vermeulen <bert@biot.com>2014-03-10 12:23:38 +0100
committerBert Vermeulen <bert@biot.com>2014-03-10 12:23:38 +0100
commitda9bcbd9f45b0153465c55ec726a0d76f6d7f01e (patch)
tree01190e6a1e52a3aedf5b2578716b8a470cd50fd0 /decoders/uart
parentd1e2129c7b01a760d48bcc8e7fc12956a62698c1 (diff)
downloadlibsigrokdecode-da9bcbd9f45b0153465c55ec726a0d76f6d7f01e.tar.gz
libsigrokdecode-da9bcbd9f45b0153465c55ec726a0d76f6d7f01e.zip
Probes, optional probes and annotations now take a tuple.
Annotation entries also consist of a tuple, not a list.
Diffstat (limited to 'decoders/uart')
-rw-r--r--decoders/uart/pd.py36
1 files changed, 18 insertions, 18 deletions
diff --git a/decoders/uart/pd.py b/decoders/uart/pd.py
index 0dd7eb0..6119b8e 100644
--- a/decoders/uart/pd.py
+++ b/decoders/uart/pd.py
@@ -78,12 +78,12 @@ class Decoder(srd.Decoder):
license = 'gplv2+'
inputs = ['logic']
outputs = ['uart']
- optional_probes = [
+ optional_probes = (
# Allow specifying only one of the signals, e.g. if only one data
# direction exists (or is relevant).
{'id': 'rx', 'name': 'RX', 'desc': 'UART receive line'},
{'id': 'tx', 'name': 'TX', 'desc': 'UART transmit line'},
- ]
+ )
options = (
{'id': 'baudrate', 'desc': 'Baud rate', 'default': 115200},
{'id': 'num_data_bits', 'desc': 'Data bits', 'default': 8,
@@ -100,22 +100,22 @@ class Decoder(srd.Decoder):
'values': ('ascii', 'dec', 'hex', 'oct', 'bin')},
# TODO: Options to invert the signal(s).
)
- annotations = [
- ['rx-data', 'RX data'],
- ['tx-data', 'TX data'],
- ['rx-start', 'RX start bits'],
- ['tx-start', 'TX start bits'],
- ['rx-parity-ok', 'RX parity OK bits'],
- ['tx-parity-ok', 'TX parity OK bits'],
- ['rx-parity-err', 'RX parity error bits'],
- ['tx-parity-err', 'TX parity error bits'],
- ['rx-stop', 'RX stop bits'],
- ['tx-stop', 'TX stop bits'],
- ['rx-warnings', 'RX warnings'],
- ['tx-warnings', 'TX warnings'],
- ['rx-data-bits', 'RX data bits'],
- ['tx-data-bits', 'TX data bits'],
- ]
+ annotations = (
+ ('rx-data', 'RX data'),
+ ('tx-data', 'TX data'),
+ ('rx-start', 'RX start bits'),
+ ('tx-start', 'TX start bits'),
+ ('rx-parity-ok', 'RX parity OK bits'),
+ ('tx-parity-ok', 'TX parity OK bits'),
+ ('rx-parity-err', 'RX parity error bits'),
+ ('tx-parity-err', 'TX parity error bits'),
+ ('rx-stop', 'RX stop bits'),
+ ('tx-stop', 'TX stop bits'),
+ ('rx-warnings', 'RX warnings'),
+ ('tx-warnings', 'TX warnings'),
+ ('rx-data-bits', 'RX data bits'),
+ ('tx-data-bits', 'TX data bits'),
+ )
annotation_rows = (
('rx-data', 'RX', (0, 2, 4, 6, 8)),
('rx-data-bits', 'RX bits', (12,)),