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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2014-01-22 22:56:08 +0100 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2014-01-28 22:46:05 +0100 |
| commit | 9f2f42c064e8a7100cee13460a7a3638f468f56a (patch) | |
| tree | 1630670b4ef3c36183282a54233c8158489010c3 /decoders/uart | |
| parent | ef36224880135a05d2fbde8f048ea3fe3f425df9 (diff) | |
| download | libsigrokdecode-9f2f42c064e8a7100cee13460a7a3638f468f56a.tar.gz libsigrokdecode-9f2f42c064e8a7100cee13460a7a3638f468f56a.zip | |
All PDs: Consistent naming/case for annotation shortnames/IDs.
Diffstat (limited to 'decoders/uart')
| -rw-r--r-- | decoders/uart/pd.py | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/decoders/uart/pd.py b/decoders/uart/pd.py index bafe112..f1c8323 100644 --- a/decoders/uart/pd.py +++ b/decoders/uart/pd.py @@ -95,12 +95,12 @@ class Decoder(srd.Decoder): # TODO: Options to invert the signal(s). } annotations = [ - ['RX data', 'UART RX data'], - ['TX data', 'UART TX data'], - ['Start bits', 'UART start bits'], - ['Parity bits', 'UART parity bits'], - ['Stop bits', 'UART stop bits'], - ['Warnings', 'Warnings'], + ['rx-data', 'UART RX data'], + ['tx-data', 'UART TX data'], + ['start-bits', 'UART start bits'], + ['parity-bits', 'UART parity bits'], + ['stop-bits', 'UART stop bits'], + ['warnings', 'Warnings'], ] binary = ( ('rx', 'RX dump'), |