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authorUwe Hermann <uwe@hermann-uwe.de>2012-07-11 22:19:31 +0200
committerUwe Hermann <uwe@hermann-uwe.de>2012-07-11 23:13:36 +0200
commit2fcd7c22852436c3226de9007e88cb305cce1b00 (patch)
treeb1681936eec81e3bd91eb43fb395fc2bcf908aba /decoders/uart
parentb5d3ea69628d49ab5b26e064559f7a237b46c086 (diff)
downloadlibsigrokdecode-2fcd7c22852436c3226de9007e88cb305cce1b00.tar.gz
libsigrokdecode-2fcd7c22852436c3226de9007e88cb305cce1b00.zip
srd: Performance improvements for various PDs.
Ignore/skip identical samples in most (low-level) PDs, as we're usually (but not necessarily always) only interested in pin changes. This yields a significant performance improvement for the PDs. The mechanism was already used in the 'i2s', 'jtag', and 'lpc' PDs, but not yet in all supported low-level decoders. The following PDs now also use this mechanism: 'dcf77', 'i2c', 'spi', 'uart', and 'usb_signalling'. Thanks Lars-Peter Clausen <lars@metafoo.de> for bringing this to our attention.
Diffstat (limited to 'decoders/uart')
-rw-r--r--decoders/uart/uart.py8
1 files changed, 7 insertions, 1 deletions
diff --git a/decoders/uart/uart.py b/decoders/uart/uart.py
index bb4d9e6..92c105c 100644
--- a/decoders/uart/uart.py
+++ b/decoders/uart/uart.py
@@ -103,6 +103,7 @@ class Decoder(srd.Decoder):
self.startsample = [-1, -1]
self.state = ['WAIT FOR START BIT', 'WAIT FOR START BIT']
self.oldbit = [None, None]
+ self.oldpins = None
def start(self, metadata):
self.samplerate = metadata['samplerate']
@@ -265,7 +266,12 @@ class Decoder(srd.Decoder):
def decode(self, ss, es, data):
# TODO: Either RX or TX could be omitted (optional probe).
- for (self.samplenum, (rx, tx)) in data:
+ for (self.samplenum, pins) in data:
+
+ # Ignore identical samples early on (for performance reasons).
+ if self.oldpins == pins:
+ continue
+ self.oldpins, (rx, tx) = pins, pins
# First sample: Save RX/TX value.
if self.oldbit[RX] == None: