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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2012-03-04 10:40:58 +0100 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2012-03-04 15:10:11 +0100 |
| commit | 1541976fcac03a780b5d27046f5f8884973c08ae (patch) | |
| tree | 054478b06b1623b05258c8fd2241eda93dbb7418 /decoders/uart | |
| parent | 2b7160383cc189f721600c04be17a980e216dfd6 (diff) | |
| download | libsigrokdecode-1541976fcac03a780b5d27046f5f8884973c08ae.tar.gz libsigrokdecode-1541976fcac03a780b5d27046f5f8884973c08ae.zip | |
srd: PDs: More cosmetics.
Diffstat (limited to 'decoders/uart')
| -rw-r--r-- | decoders/uart/__init__.py | 10 | ||||
| -rw-r--r-- | decoders/uart/uart.py | 3 |
2 files changed, 4 insertions, 9 deletions
diff --git a/decoders/uart/__init__.py b/decoders/uart/__init__.py index 43e7706..d41a964 100644 --- a/decoders/uart/__init__.py +++ b/decoders/uart/__init__.py @@ -97,15 +97,13 @@ UART packet: [<packet-type>, <rxtx>, <packet-data>] This is the list of <packet-types>s and their respective <packet-data>: - - 'STARTBIT': The data is the (integer) value of the start bit (0 or 1). + - 'STARTBIT': The data is the (integer) value of the start bit (0/1). - 'DATA': The data is the (integer) value of the UART data. Valid values range from 0 to 512 (as the data can be up to 9 bits in size). - - 'PARITYBIT': The data is the (integer) value of the parity bit (0 or 1). + - 'PARITYBIT': The data is the (integer) value of the parity bit (0/1). - 'STOPBIT': The data is the (integer) value of the stop bit (0 or 1). - - 'INVALID STARTBIT': The data is the (integer) value of the start bit - (0 or 1). - - 'INVALID STOPBIT': The data is the (integer) value of the stop bit - (0 or 1). + - 'INVALID STARTBIT': The data is the (integer) value of the start bit (0/1). + - 'INVALID STOPBIT': The data is the (integer) value of the stop bit (0/1). - 'PARITY ERROR': The data is a tuple with two entries. The first one is the expected parity value, the second is the actual parity value. - TODO: Frame error? diff --git a/decoders/uart/uart.py b/decoders/uart/uart.py index 2bb61dd..057a890 100644 --- a/decoders/uart/uart.py +++ b/decoders/uart/uart.py @@ -102,10 +102,7 @@ class Decoder(srd.Decoder): self.paritybit = [-1, -1] self.stopbit1 = [-1, -1] self.startsample = [-1, -1] - - # Initial state. self.state = ['WAIT FOR START BIT', 'WAIT FOR START BIT'] - self.oldbit = [None, None] def start(self, metadata): |