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authorGerhard Sittig <gerhard.sittig@gmx.net>2022-12-30 14:10:04 +0100
committerGerhard Sittig <gerhard.sittig@gmx.net>2023-01-09 20:13:35 +0100
commit912f4e8a245f014b312bfc90e4ec6dba256379d4 (patch)
tree3c6b96898e6ef694739546003c118ef1097009c7 /decoders/rc_encode/pd.py
parent317eaa7fd83fb049db97e863a306992a34fcf490 (diff)
downloadlibsigrokdecode-912f4e8a245f014b312bfc90e4ec6dba256379d4.tar.gz
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adf435x: Python list idioms in bits sequence accumulation
Use .extend() and .clear() for the Python list during accumulation of a 32bit word's bits sequence. This shall improve readability. Performance is less of an issue since this decoder's data amount remains small (32bit entities per SPI transfer). Comment on the unexpected(?) SPI decoder's BITS ordering when passing details up to stacked decoders. Raise and keep awareness for this non-obvious implementation detail during decoder maintenance. This implementation accumulates bits in the MSB order as they are sent in SPI frames. Yet keeps the LSB bit order when a completely accumulated 32bit word gets inspected, to reduce the diff size. Bit field extraction and annotation emission code paths assume a specific timestamp ordering. The separation of transport and inspection also simplifies maintenance, should a future SPI decoder provide BITS in their received order.
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