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authorUwe Hermann <uwe@hermann-uwe.de>2017-03-02 00:03:16 +0100
committerUwe Hermann <uwe@hermann-uwe.de>2017-03-03 20:12:53 +0100
commitfcd5d23a05282728ad7693f997b1b81d67d409cb (patch)
tree2ee94e2aa9865e53d26b7cc7cc3b0c37d6586baf /decoders/parallel
parent01b60707d7aa8db402c9288472c102da483cad39 (diff)
downloadlibsigrokdecode-fcd5d23a05282728ad7693f997b1b81d67d409cb.tar.gz
libsigrokdecode-fcd5d23a05282728ad7693f997b1b81d67d409cb.zip
Drop obsolete workarounds in PDs.
Some PDs were using a temporary workaround for (as it turned out) a refcounting issue that was fixed in 066fbafdc3ba734a73b5f7fcfa1dbae67ddebf8a.
Diffstat (limited to 'decoders/parallel')
-rw-r--r--decoders/parallel/pd.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/decoders/parallel/pd.py b/decoders/parallel/pd.py
index 748cb2b..db9b371 100644
--- a/decoders/parallel/pd.py
+++ b/decoders/parallel/pd.py
@@ -177,7 +177,7 @@ class Decoder(srd.Decoder):
if self.has_channel(i):
conds.append({i: 'e'})
while True:
- self.handle_bits(self.wait(conds[:])[1:])
+ self.handle_bits(self.wait(conds)[1:])
else:
# Sample on the rising or falling CLK edge (depends on config).
while True: